Searched refs:pll_clock (Results 1 - 8 of 8) sorted by relevance

/linux-4.4.14/drivers/clk/h8300/
H A Dclk-h8s2678.c18 struct pll_clock { struct
24 #define to_pll_clock(_hw) container_of(_hw, struct pll_clock, hw)
29 struct pll_clock *pll_clock = to_pll_clock(hw); pll_recalc_rate() local
30 int mul = 1 << (readb(pll_clock->pllcr) & 3); pll_recalc_rate()
63 struct pll_clock *pll_clock = to_pll_clock(hw); pll_set_rate() local
67 val = readb(pll_clock->sckcr); pll_set_rate()
69 writeb(val, pll_clock->sckcr); pll_set_rate()
70 val = readb(pll_clock->pllcr); pll_set_rate()
73 writeb(val, pll_clock->pllcr); pll_set_rate()
90 struct pll_clock *pll_clock; h8s2678_pll_clk_setup() local
100 pll_clock = kzalloc(sizeof(*pll_clock), GFP_KERNEL); h8s2678_pll_clk_setup()
101 if (!pll_clock) h8s2678_pll_clk_setup()
104 pll_clock->sckcr = of_iomap(node, 0); h8s2678_pll_clk_setup()
105 if (pll_clock->sckcr == NULL) { h8s2678_pll_clk_setup()
110 pll_clock->pllcr = of_iomap(node, 1); h8s2678_pll_clk_setup()
111 if (pll_clock->pllcr == NULL) { h8s2678_pll_clk_setup()
122 pll_clock->hw.init = &init; h8s2678_pll_clk_setup()
124 clk = clk_register(NULL, &pll_clock->hw); h8s2678_pll_clk_setup()
135 iounmap(pll_clock->pllcr); h8s2678_pll_clk_setup()
137 iounmap(pll_clock->sckcr); h8s2678_pll_clk_setup()
139 kfree(pll_clock); h8s2678_pll_clk_setup()
/linux-4.4.14/include/uapi/linux/
H A Drtc.h50 * pll_value*pll_posmult/pll_clock
52 * pll_value*pll_negmult/pll_clock
62 long pll_clock; /* base PLL frequency */ member in struct:rtc_pll_info
/linux-4.4.14/drivers/ata/
H A Dpata_pdc2027x.c516 * @pll_clock: The input of PLL in HZ
518 static void pdc_adjust_pll(struct ata_host *host, long pll_clock, unsigned int board_idx) pdc_adjust_pll() argument
522 long pll_clock_khz = pll_clock / 1000; pdc_adjust_pll()
610 long pll_clock, usec_elapsed; pdc_detect_pll_input_clock() local
638 pll_clock = ((start_count - end_count) & 0x3fffffff) / 100 * pdc_detect_pll_input_clock()
642 PDPRINTK("PLL input clock[%ld]Hz\n", pll_clock); pdc_detect_pll_input_clock()
644 return pll_clock; pdc_detect_pll_input_clock()
654 long pll_clock; pdc_hardware_init() local
662 pll_clock = pdc_detect_pll_input_clock(host); pdc_hardware_init()
664 dev_info(host->dev, "PLL input clock %ld kHz\n", pll_clock/1000); pdc_hardware_init()
667 pdc_adjust_pll(host, pll_clock, board_idx); pdc_hardware_init()
/linux-4.4.14/arch/m68k/q40/
H A Dconfig.c313 pll->pll_clock = 125829120; q40_get_rtc_pll()
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Datombios_crtc.c745 u32 pll_clock = mode->clock; amdgpu_atombios_crtc_set_pll() local
775 amdgpu_pll_compute(pll, amdgpu_crtc->adjusted_clock, &pll_clock, amdgpu_atombios_crtc_set_pll()
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Datombios_crtc.c1061 u32 pll_clock = mode->clock; atombios_crtc_set_pll() local
1094 radeon_compute_pll_legacy(pll, radeon_crtc->adjusted_clock, &pll_clock, atombios_crtc_set_pll()
1097 radeon_compute_pll_avivo(pll, radeon_crtc->adjusted_clock, &pll_clock, atombios_crtc_set_pll()
1100 radeon_compute_pll_legacy(pll, radeon_crtc->adjusted_clock, &pll_clock, atombios_crtc_set_pll()
/linux-4.4.14/drivers/char/
H A Dgenrtc.c455 pll.pll_clock); gen_rtc_proc_show()
/linux-4.4.14/drivers/gpu/drm/i915/
H A Dintel_drv.h1164 int chv_calc_dpll_params(int refclk, intel_clock_t *pll_clock);

Completed in 744 milliseconds