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Searched refs:pll_a (Results 1 – 25 of 25) sorted by relevance

/linux-4.4.14/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-trimslice.txt7 "pll_a" (The Tegra clock of that name),
20 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm9712.txt8 - pll_a
59 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm8753.txt8 - pll_a
38 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-alc5632.txt8 - pll_a
47 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-max98090.txt8 - pll_a
52 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-rt5640.txt8 - pll_a
51 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-wm8903.txt8 - pll_a
58 clock-names = "pll_a", "pll_a_out0", "mclk";
Dnvidia,tegra-audio-rt5677.txt8 - pll_a
66 clock-names = "pll_a", "pll_a_out0", "mclk";
/linux-4.4.14/drivers/gpu/drm/i915/
Ddvo_ns2501.c209 uint8_t pll_a; /* PLL configuration, register A, 1B */ member
236 .pll_a = 17,
256 .pll_a = 25,
275 .pll_a = 11,
613 ns2501_writeb(dvo, NS2501_REG1B, conf->pll_a); in ns2501_mode_set()
/linux-4.4.14/arch/arm/boot/dts/
Dtegra20-plutux.dts59 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-tec.dts68 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-medcom-wide.dts87 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-trimslice.dts466 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-colibri-512.dtsi531 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-paz00.dts596 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra124-nyan.dtsi694 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-whistler.dts630 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-ventana.dts700 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-cardhu.dtsi617 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-harmony.dts775 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra20-seaboard.dts934 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra124-venice2.dts1163 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra114-dalmore.dts1285 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra124-jetson-tk1.dts1928 clock-names = "pll_a", "pll_a_out0", "mclk";
Dtegra30-beaver.dts2102 clock-names = "pll_a", "pll_a_out0", "mclk";