Searched refs:phase_shedding_limits_table (Results 1 – 7 of 7) sorted by relevance
430 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in amdgpu_parse_extended_power_table()434 if (!adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) { in amdgpu_parse_extended_power_table()441 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk = in amdgpu_parse_extended_power_table()443 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk = in amdgpu_parse_extended_power_table()445 adev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage = in amdgpu_parse_extended_power_table()450 adev->pm.dpm.dyn_state.phase_shedding_limits_table.count = in amdgpu_parse_extended_power_table()758 kfree(dyn_state->phase_shedding_limits_table.entries); in amdgpu_free_extended_power_table()
1526 struct amdgpu_phase_shedding_limits_table phase_shedding_limits_table; member
3016 &adev->pm.dpm.dyn_state.phase_shedding_limits_table, in ci_populate_single_memory_level()3348 &adev->pm.dpm.dyn_state.phase_shedding_limits_table, in ci_populate_single_graphic_level()5216 &adev->pm.dpm.dyn_state.phase_shedding_limits_table); in ci_patch_dependency_tables_with_leakage()
989 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries = in r600_parse_extended_power_table()993 if (!rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries) { in r600_parse_extended_power_table()1000 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].sclk = in r600_parse_extended_power_table()1002 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].mclk = in r600_parse_extended_power_table()1004 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.entries[i].voltage = in r600_parse_extended_power_table()1009 rdev->pm.dpm.dyn_state.phase_shedding_limits_table.count = in r600_parse_extended_power_table()1304 kfree(dyn_state->phase_shedding_limits_table.entries); in r600_free_extended_power_table()
4106 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) { in si_populate_smc_voltage_tables()4456 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, in si_populate_smc_initial_state()4542 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, in si_populate_smc_acpi_state()4569 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, in si_populate_smc_acpi_state()5082 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, in si_convert_power_level_to_smc()
2881 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, in ci_populate_single_memory_level()3210 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table, in ci_populate_single_graphic_level()5048 &rdev->pm.dpm.dyn_state.phase_shedding_limits_table); in ci_patch_dependency_tables_with_leakage()
1502 struct radeon_phase_shedding_limits_table phase_shedding_limits_table; member