| /linux-4.4.14/arch/arm/mach-exynos/ |
| H A D | pm_domains.c | 37 struct clk *oscclk; member in struct:exynos_pm_domain
60 /* Set oscclk before powering off a domain*/ exynos_pd_power()
66 if (clk_set_parent(pd->clk[i], pd->oscclk)) exynos_pd_power()
67 pr_err("%s: error setting oscclk as parent to clock %d\n", exynos_pd_power()
166 pd->oscclk = of_clk_get_by_name(np, "oscclk"); exynos4_pm_init_power_domain()
167 if (IS_ERR(pd->oscclk)) exynos4_pm_init_power_domain()
185 clk_put(pd->oscclk); exynos4_pm_init_power_domain()
|
| /linux-4.4.14/drivers/clk/samsung/ |
| H A D | clk-exynos5433.c | 202 PNAME(mout_aud_pll_p) = { "oscclk", "fout_aud_pll", };
203 PNAME(mout_isp_pll_p) = { "oscclk", "fout_isp_pll", };
204 PNAME(mout_aud_pll_user_p) = { "oscclk", "mout_aud_pll", };
205 PNAME(mout_mphy_pll_user_p) = { "oscclk", "sclk_mphy_pll", };
206 PNAME(mout_mfc_pll_user_p) = { "oscclk", "sclk_mfc_pll", };
207 PNAME(mout_bus_pll_user_p) = { "oscclk", "sclk_bus_pll", };
208 PNAME(mout_bus_pll_user_t_p) = { "oscclk", "mout_bus_pll_user", };
209 PNAME(mout_mphy_pll_user_t_p) = { "oscclk", "mout_mphy_pll_user", };
240 "oscclk", "ioclk_spdif_extclk", };
241 PNAME(mout_sclk_audio1_p) = { "ioclk_audiocdclk1", "oscclk",
243 PNAME(mout_sclk_audio0_p) = { "ioclk_audiocdclk0", "oscclk",
249 FFACTOR(0, "oscclk_efuse_common", "oscclk", 1, 1, 0),
653 GATE(CLK_SCLK_ISP_MCTADC_CAM1, "sclk_isp_mctadc_cam1", "oscclk",
788 PLL(pll_35xx, CLK_FOUT_ISP_PLL, "fout_isp_pll", "oscclk",
790 PLL(pll_36xx, CLK_FOUT_AUD_PLL, "fout_aud_pll", "oscclk",
841 PNAME(mout_mphy_pll_p) = { "oscclk", "fout_mphy_pll", };
844 PLL(pll_35xx, CLK_FOUT_MPHY_PLL, "fout_mphy_pll", "oscclk",
1049 PLL(pll_35xx, CLK_FOUT_MEM0_PLL, "fout_mem0_pll", "oscclk",
1051 PLL(pll_35xx, CLK_FOUT_MEM1_PLL, "fout_mem1_pll", "oscclk",
1053 PLL(pll_35xx, CLK_FOUT_BUS_PLL, "fout_bus_pll", "oscclk",
1055 PLL(pll_35xx, CLK_FOUT_MFC_PLL, "fout_mfc_pll", "oscclk",
1064 PNAME(mout_mfc_pll_p) = { "oscclk", "fout_mfc_pll", };
1065 PNAME(mout_bus_pll_p) = { "oscclk", "fout_bus_pll", };
1066 PNAME(mout_mem1_pll_p) = { "oscclk", "fout_mem1_pll", };
1067 PNAME(mout_mem0_pll_p) = { "oscclk", "fout_mem0_pll", };
1085 PNAME(mout_sclk_decon_p) = { "oscclk", "mout_bus_pll_div2", };
1097 PNAME(mout_sclk_dsd_a_p) = { "oscclk", "mout_mfc_pll_div2", };
1277 GATE(CLK_RCLK_DREX1, "rclk_drex1", "oscclk", ENABLE_ACLK_MIF0,
1279 GATE(CLK_RCLK_DREX0, "rclk_drex0", "oscclk", ENABLE_ACLK_MIF0,
1580 DIV(CLK_DIV_SCLK_SCI, "div_sclk_sci", "oscclk", DIV_PERIC, 4, 4),
1581 DIV(CLK_DIV_SCLK_SC_IN, "div_sclk_sc_in", "oscclk", DIV_PERIC, 0, 4),
1695 GATE(CLK_SCLK_PWM, "sclk_pwm", "oscclk", ENABLE_SCLK_PERIC, 15, 0, 0),
1964 PNAME(mout_sclk_ufs_mphy_user_p) = { "oscclk", "sclk_ufs_mphy", };
1965 PNAME(mout_aclk_fsys_200_user_p) = { "oscclk", "div_aclk_fsys_200", };
1966 PNAME(mout_sclk_pcie_100_user_p) = { "oscclk", "sclk_pcie_100_fsys",};
1967 PNAME(mout_sclk_ufsunipro_user_p) = { "oscclk", "sclk_ufsunipro_fsys",};
1968 PNAME(mout_sclk_mmc2_user_p) = { "oscclk", "sclk_mmc2_fsys", };
1969 PNAME(mout_sclk_mmc1_user_p) = { "oscclk", "sclk_mmc1_fsys", };
1970 PNAME(mout_sclk_mmc0_user_p) = { "oscclk", "sclk_mmc0_fsys", };
1971 PNAME(mout_sclk_usbhost30_user_p) = { "oscclk", "sclk_usbhost30_fsys",};
1972 PNAME(mout_sclk_usbdrd30_user_p) = { "oscclk", "sclk_usbdrd30_fsys", };
1975 = { "oscclk", "phyclk_usbhost30_uhost30_pipe_pclk_phy", };
1977 = { "oscclk", "phyclk_usbhost30_uhost30_phyclock_phy", };
1979 = { "oscclk", "phyclk_usbhost20_phy_hsic1_phy", };
1981 = { "oscclk", "phyclk_usbhost20_phy_clk48mohci_phy", };
1983 = { "oscclk", "phyclk_usbhost20_phy_phyclock_phy", };
1985 = { "oscclk", "phyclk_usbhost20_phy_freeclk_phy", };
1987 = { "oscclk", "phyclk_usbdrd30_udrd30_pipe_pclk_phy", };
1989 = { "oscclk", "phyclk_usbdrd30_udrd30_phyclock_phy", };
1991 = { "oscclk", "phyclk_ufs_rx1_symbol_phy", };
1993 = { "oscclk", "phyclk_ufs_rx0_symbol_phy", };
1995 = { "oscclk", "phyclk_ufs_tx1_symbol_phy", };
1997 = { "oscclk", "phyclk_ufs_tx0_symbol_phy", };
1999 = { "oscclk", "phyclk_lli_mphy_to_ufs_phy", };
2378 PNAME(mout_aclk_g2d_266_user_p) = { "oscclk", "aclk_g2d_266", };
2379 PNAME(mout_aclk_g2d_400_user_p) = { "oscclk", "aclk_g2d_400", };
2544 PNAME(mout_disp_pll_p) = { "oscclk", "fout_disp_pll", };
2545 PNAME(mout_sclk_dsim1_user_p) = { "oscclk", "sclk_dsim1_disp", };
2546 PNAME(mout_sclk_dsim0_user_p) = { "oscclk", "sclk_dsim0_disp", };
2547 PNAME(mout_sclk_dsd_user_p) = { "oscclk", "sclk_dsd_disp", };
2548 PNAME(mout_sclk_decon_tv_eclk_user_p) = { "oscclk",
2550 PNAME(mout_sclk_decon_vclk_user_p) = { "oscclk",
2552 PNAME(mout_sclk_decon_eclk_user_p) = { "oscclk",
2554 PNAME(mout_sclk_decon_tv_vlkc_user_p) = { "oscclk",
2556 PNAME(mout_aclk_disp_333_user_p) = { "oscclk", "aclk_disp_333", };
2558 PNAME(mout_phyclk_mipidphy1_bitclkdiv8_user_p) = { "oscclk",
2560 PNAME(mout_phyclk_mipidphy1_rxclkesc0_user_p) = { "oscclk",
2562 PNAME(mout_phyclk_mipidphy0_bitclkdiv8_user_p) = { "oscclk",
2564 PNAME(mout_phyclk_mipidphy0_rxclkesc0_user_p) = { "oscclk",
2566 PNAME(mout_phyclk_hdmiphy_tmds_clko_user_p) = { "oscclk",
2568 PNAME(mout_phyclk_hdmiphy_pixel_clko_user_p) = { "oscclk",
2589 PLL(pll_35xx, CLK_FOUT_DISP_PLL, "fout_disp_pll", "oscclk",
2936 PNAME(mout_aud_pll_user_aud_p) = { "oscclk", "fout_aud_pll", };
3086 PNAME(mout_aclk_bus2_400_p) = { "oscclk", "aclk_bus2_400", };
3279 PNAME(mout_g3d_pll_p) = { "oscclk", "fout_g3d_pll", };
3282 PLL(pll_35xx, CLK_FOUT_G3D_PLL, "fout_g3d_pll", "oscclk",
3399 PNAME(aclk_gscl_111_user_p) = { "oscclk", "aclk_gscl_111", };
3400 PNAME(aclk_gscl_333_user_p) = { "oscclk", "aclk_gscl_333", };
3571 PNAME(mout_apollo_pll_p) = { "oscclk", "fout_apollo_pll", };
3572 PNAME(mout_bus_pll_apollo_user_p) = { "oscclk", "sclk_bus_pll_apollo", };
3577 PLL(pll_35xx, CLK_FOUT_APOLLO_PLL, "fout_apollo_pll", "oscclk",
3763 PNAME(mout_atlas_pll_p) = { "oscclk", "fout_atlas_pll", };
3764 PNAME(mout_bus_pll_atlas_user_p) = { "oscclk", "sclk_bus_pll_atlas", };
3769 PLL(pll_35xx, CLK_FOUT_ATLAS_PLL, "fout_atlas_pll", "oscclk",
3961 PNAME(mout_sclk_jpeg_user_p) = { "oscclk", "sclk_jpeg_mscl", };
3962 PNAME(mout_aclk_mscl_400_user_p) = { "oscclk", "aclk_mscl_400", };
4112 PNAME(mout_aclk_mfc_400_user_p) = { "oscclk", "aclk_mfc_400", };
4222 PNAME(mout_aclk_hevc_400_user_p) = { "oscclk", "aclk_hevc_400", };
4338 PNAME(mout_aclk_isp_dis_400_user_p) = { "oscclk", "aclk_isp_dis_400", };
4339 PNAME(mout_aclk_isp_400_user_p) = { "oscclk", "aclk_isp_400", };
4630 PNAME(mout_aclk_cam0_333_user_p) = { "oscclk", "aclk_cam0_333", };
4631 PNAME(mout_aclk_cam0_400_user_p) = { "oscclk", "aclk_cam0_400", };
4632 PNAME(mout_aclk_cam0_552_user_p) = { "oscclk", "aclk_cam0_552", };
4634 PNAME(mout_phyclk_rxbyteclkhs0_s4_user_p) = { "oscclk",
4636 PNAME(mout_phyclk_rxbyteclkhs0_s2a_user_p) = { "oscclk",
5095 PNAME(mout_sclk_isp_uart_user_p) = { "oscclk", "sclk_isp_uart_cam1", };
5096 PNAME(mout_sclk_isp_spi1_user_p) = { "oscclk", "sclk_isp_spi1_cam1", };
5097 PNAME(mout_sclk_isp_spi0_user_p) = { "oscclk", "sclk_isp_spi0_cam1", };
5099 PNAME(mout_aclk_cam1_333_user_p) = { "oscclk", "aclk_cam1_333", };
5100 PNAME(mout_aclk_cam1_400_user_p) = { "oscclk", "aclk_cam1_400", };
5101 PNAME(mout_aclk_cam1_552_user_p) = { "oscclk", "aclk_cam1_552", };
5103 PNAME(mout_phyclk_rxbyteclkhs0_s2b_user_p) = { "oscclk",
5368 GATE(CLK_SCLK_ISP_I2C2, "sclk_isp_i2c2", "oscclk", ENABLE_SCLK_CAM1,
5370 GATE(CLK_SCLK_ISP_I2C1, "sclk_isp_i2c1", "oscclk", ENABLE_SCLK_CAM1,
5372 GATE(CLK_SCLK_ISP_I2C0, "sclk_isp_i2c0", "oscclk", ENABLE_SCLK_CAM1,
5374 GATE(CLK_SCLK_ISP_PWM, "sclk_isp_pwm", "oscclk", ENABLE_SCLK_CAM1,
|
| H A D | clk-exynos5420.c | 1250 { .compatible = "samsung,exynos5420-oscclk", .data = (void *)0, },
|
| /linux-4.4.14/drivers/media/dvb-frontends/ |
| H A D | drxd_hard.c | 2603 /* Delay = ( delay (nano seconds) * oscclk (kHz) )/ 1000 */ CDRXD()
|
| H A D | drxk_hard.c | 6091 /* Delay = (delay (nano seconds) * oscclk (kHz))/ 1000 */ init_drxk()
|
| /linux-4.4.14/drivers/media/dvb-frontends/drx39xyj/ |
| H A D | drxj.c | 2408 /* Delay = ( delay (nano seconds) * oscclk (kHz) )/ 1000 */ init_hi()
|