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Searched refs:omap_ctrl_writel (Results 1 – 7 of 7) sorted by relevance

/linux-4.4.14/arch/arm/mach-omap2/
Dcontrol.c191 omap_ctrl_writel(tmp, offset); in omap_ctrl_writeb()
204 omap_ctrl_writel(tmp, offset); in omap_ctrl_writew()
207 void omap_ctrl_writel(u32 val, u16 offset) in omap_ctrl_writel() function
268 omap_ctrl_writel(bootaddr, offset); in omap_ctrl_write_dsp_boot_addr()
289 omap_ctrl_writel(bootmode, offset); in omap_ctrl_write_dsp_boot_mode()
492 omap_ctrl_writel(control_context.sysconfig, OMAP2_CONTROL_SYSCONFIG); in omap3_control_restore_context()
493 omap_ctrl_writel(control_context.devconf0, OMAP2_CONTROL_DEVCONF0); in omap3_control_restore_context()
494 omap_ctrl_writel(control_context.mem_dftrw0, in omap3_control_restore_context()
496 omap_ctrl_writel(control_context.mem_dftrw1, in omap3_control_restore_context()
498 omap_ctrl_writel(control_context.msuspendmux_0, in omap3_control_restore_context()
[all …]
Domap_phy_internal.c78 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
81 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
100 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); in am35x_musb_phy_power()
120 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); in am35x_musb_phy_power()
130 omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35x_musb_clear_irq()
153 omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2); in am35x_set_mode()
Dhsmmc.c62 omap_ctrl_writel(reg, OMAP243X_CONTROL_DEVCONF1); in omap_hsmmc1_before_set_reg()
68 omap_ctrl_writel(reg, OMAP2_CONTROL_DEVCONF0); in omap_hsmmc1_before_set_reg()
76 omap_ctrl_writel(prog_io, OMAP343X_CONTROL_PROG_IO1); in omap_hsmmc1_before_set_reg()
81 omap_ctrl_writel(reg, control_pbias_offset); in omap_hsmmc1_before_set_reg()
85 omap_ctrl_writel(reg, control_pbias_offset); in omap_hsmmc1_before_set_reg()
103 omap_ctrl_writel(reg, control_pbias_offset); in omap_hsmmc1_after_set_reg()
108 omap_ctrl_writel(reg, control_pbias_offset); in omap_hsmmc1_after_set_reg()
121 omap_ctrl_writel(reg, control_devconf1_offset); in hsmmc2_select_input_clk_src()
Dpdata-quirks.c67 omap_ctrl_writel(reg, OMAP343X_CONTROL_PBIAS_LITE); in omap3_gpio126_127_129()
71 omap_ctrl_writel(reg, OMAP34XX_CONTROL_WKUP_CTRL); in omap3_gpio126_127_129()
81 omap_ctrl_writel(reg, OMAP343X_CONTROL_DEVCONF1); in hsmmc2_internal_input_clk()
182 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_enable_emac_int()
192 omap_ctrl_writel(v, AM35XX_CONTROL_LVL_INTR_CLEAR); in am35xx_disable_emac_int()
207 omap_ctrl_writel(v, AM35XX_CONTROL_IP_SW_RESET); in am35xx_emac_reset()
Dcontrol.h451 extern void omap_ctrl_writel(u32 val, u16 offset);
478 #define omap_ctrl_writel(x, y) WARN_ON(1) macro
Dpm24xx.c88 omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0); in omap2_enter_full_retention()
Dpm34xx.c83 omap_ctrl_writel(omap_ctrl_readl(OMAP343X_PADCONF_ETK_D14), in omap3_core_save_context()