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Searched refs:nx_pcibase (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/drivers/scsi/qla2xxx/
Dqla_nx.c362 writel(ha->crb_win, CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
367 win_read = RD_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_pci_set_crbwindow_2M()
374 *off_out = (off_in & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla82xx_pci_set_crbwindow_2M()
429 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
442 *off_out = off_in + m->start_2M - m->start_128M + ha->nx_pcibase; in qla82xx_pci_get_crb_addr_2M()
933 WRT_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase, off & 0xFFFF0000); in qla82xx_md_rw_32()
936 RD_REG_DWORD(CRB_WINDOW_2M + ha->nx_pcibase); in qla82xx_md_rw_32()
940 WRT_REG_DWORD(off_value + CRB_INDIRECT_2M + ha->nx_pcibase, in qla82xx_md_rw_32()
944 ha->nx_pcibase); in qla82xx_md_rw_32()
1672 ha->nx_pcibase = ioremap(pci_resource_start(ha->pdev, 0), len); in qla82xx_iospace_config()
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Dqla_nx2.c22 return readl((void __iomem *) (ha->nx_pcibase + addr)); in qla8044_rd_reg()
28 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); in qla8044_wr_reg()
2569 r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase)); in qla8044_minidump_process_rdocm()
Dqla_os.c2910 if (!ha->nx_pcibase) in qla2x00_probe_one()
2911 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_probe_one()
3046 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_unmap_iobases()
Dqla_def.h3428 void __iomem *nx_pcibase; /* Base I/O address */ member
/linux-4.4.14/drivers/scsi/qla4xxx/
Dql4_nx.c43 return (void __iomem *)(ha->nx_pcibase + off); in qla4_8xxx_pci_base_offsetfset()
364 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
368 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_pci_set_crbwindow_2M()
374 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; in qla4_82xx_pci_set_crbwindow_2M()
432 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()
438 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_rd_32()
447 ha->nx_pcibase)); in qla4_82xx_md_rd_32()
458 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()
463 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); in qla4_82xx_md_wr_32()
472 ha->nx_pcibase)); in qla4_82xx_md_wr_32()
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Dql4_83xx.c18 return readl((void __iomem *)(ha->nx_pcibase + addr)); in qla4_83xx_rd_reg()
23 writel(val, (void __iomem *)(ha->nx_pcibase + addr)); in qla4_83xx_wr_reg()
Dql4_def.h740 unsigned long nx_pcibase; /* Base I/O address */ member
Dql4_os.c4166 if (ha->nx_pcibase) in qla4xxx_mem_free()
4168 (struct device_reg_82xx __iomem *)ha->nx_pcibase); in qla4xxx_mem_free()
4170 if (ha->nx_pcibase) in qla4xxx_mem_free()
4172 (struct device_reg_83xx __iomem *)ha->nx_pcibase); in qla4xxx_mem_free()
5507 ha->nx_pcibase = (unsigned long)ioremap(mem_base, mem_len); in qla4_8xxx_iospace_config()
5508 if (!ha->nx_pcibase) { in qla4_8xxx_iospace_config()
5520 ((uint8_t *)ha->nx_pcibase + 0xbc000 + in qla4_8xxx_iospace_config()
5526 ((uint8_t *)ha->nx_pcibase); in qla4_8xxx_iospace_config()