| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/bios/ |
| D | vmap.c | 91 info->min = nvbios_rd32(bios, vmap + 0x00); in nvbios_vmap_entry_parse()
92 info->max = nvbios_rd32(bios, vmap + 0x04); in nvbios_vmap_entry_parse()
93 info->arg[0] = nvbios_rd32(bios, vmap + 0x08); in nvbios_vmap_entry_parse()
94 info->arg[1] = nvbios_rd32(bios, vmap + 0x0c); in nvbios_vmap_entry_parse()
95 info->arg[2] = nvbios_rd32(bios, vmap + 0x10); in nvbios_vmap_entry_parse()
100 info->min = nvbios_rd32(bios, vmap + 0x02); in nvbios_vmap_entry_parse()
101 info->max = nvbios_rd32(bios, vmap + 0x06); in nvbios_vmap_entry_parse()
102 info->arg[0] = nvbios_rd32(bios, vmap + 0x0a); in nvbios_vmap_entry_parse()
103 info->arg[1] = nvbios_rd32(bios, vmap + 0x0e); in nvbios_vmap_entry_parse()
104 info->arg[2] = nvbios_rd32(bios, vmap + 0x12); in nvbios_vmap_entry_parse()
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| D | pmu.c | 52 data = nvbios_rd32(bios, bit_p.offset + 0x00); in nvbios_pmuTe()
86 info->data = nvbios_rd32(bios, data + 0x02); in nvbios_pmuEp()
102 info->init_addr_pmu = nvbios_rd32(bios, data + 0x08); in nvbios_pmuRm()
103 info->args_addr_pmu = nvbios_rd32(bios, data + 0x0c); in nvbios_pmuRm()
105 info->boot_addr_pmu = nvbios_rd32(bios, data + 0x10) + in nvbios_pmuRm()
106 nvbios_rd32(bios, data + 0x18); in nvbios_pmuRm()
107 info->boot_size = nvbios_rd32(bios, data + 0x1c) - in nvbios_pmuRm()
108 nvbios_rd32(bios, data + 0x18); in nvbios_pmuRm()
112 info->code_size = nvbios_rd32(bios, data + 0x20); in nvbios_pmuRm()
114 nvbios_rd32(bios, data + 0x24); in nvbios_pmuRm()
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| D | timing.c | 135 p->timing[0] = nvbios_rd32(bios, data + 0x00); in nvbios_timingEp()
136 p->timing[1] = nvbios_rd32(bios, data + 0x04); in nvbios_timingEp()
137 p->timing[2] = nvbios_rd32(bios, data + 0x08); in nvbios_timingEp()
138 p->timing[3] = nvbios_rd32(bios, data + 0x0c); in nvbios_timingEp()
139 p->timing[4] = nvbios_rd32(bios, data + 0x10); in nvbios_timingEp()
140 p->timing[5] = nvbios_rd32(bios, data + 0x14); in nvbios_timingEp()
141 p->timing[6] = nvbios_rd32(bios, data + 0x18); in nvbios_timingEp()
142 p->timing[7] = nvbios_rd32(bios, data + 0x1c); in nvbios_timingEp()
143 p->timing[8] = nvbios_rd32(bios, data + 0x20); in nvbios_timingEp()
144 p->timing[9] = nvbios_rd32(bios, data + 0x24); in nvbios_timingEp()
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| D | volt.c | 89 info->base = nvbios_rd32(bios, volt + 0x04); in nvbios_volt_parse()
97 info->min = nvbios_rd32(bios, volt + 0x0a); in nvbios_volt_parse()
98 info->max = nvbios_rd32(bios, volt + 0x0e); in nvbios_volt_parse()
99 info->base = nvbios_rd32(bios, volt + 0x12) & 0x00ffffff; in nvbios_volt_parse()
102 if (nvbios_rd32(bios, volt + 0x4) & 1) { in nvbios_volt_parse()
104 info->pwm_freq = nvbios_rd32(bios, volt + 0x5) / 1000; in nvbios_volt_parse()
105 info->pwm_range = nvbios_rd32(bios, volt + 0x16); in nvbios_volt_parse()
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| D | init.c | 482 u32 reg = nvbios_rd32(bios, table + (cond * 12) + 0); in init_condition_met()
483 u32 msk = nvbios_rd32(bios, table + (cond * 12) + 4); in init_condition_met()
484 u32 val = nvbios_rd32(bios, table + (cond * 12) + 8); in init_condition_met()
626 u32 reg = nvbios_rd32(bios, init->offset + 7); in init_io_restrict_prog()
636 u32 data = nvbios_rd32(bios, init->offset); in init_io_restrict_prog()
690 u32 reg = nvbios_rd32(bios, init->offset + 8); in init_io_restrict_pll()
740 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_copy()
882 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_andn_reg()
883 u32 mask = nvbios_rd32(bios, init->offset + 5); in init_andn_reg()
899 u32 reg = nvbios_rd32(bios, init->offset + 1); in init_or_reg()
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| D | pll.c | 149 if (nvbios_rd32(bios, data + 3) == reg) { in pll_map_reg()
164 if (nvbios_rd32(bios, data) == map->reg) in pll_map_reg()
192 *reg = nvbios_rd32(bios, data + 3); in pll_map_type()
206 if (nvbios_rd32(bios, data) == map->reg) in pll_map_type()
250 info->vco1.min_freq = nvbios_rd32(bios, data + 0); in nvbios_pll_parse()
251 info->vco1.max_freq = nvbios_rd32(bios, data + 4); in nvbios_pll_parse()
252 info->vco2.min_freq = nvbios_rd32(bios, data + 8); in nvbios_pll_parse()
253 info->vco2.max_freq = nvbios_rd32(bios, data + 12); in nvbios_pll_parse()
254 info->vco1.min_inputfreq = nvbios_rd32(bios, data + 16); in nvbios_pll_parse()
255 info->vco2.min_inputfreq = nvbios_rd32(bios, data + 20); in nvbios_pll_parse()
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| D | dcb.c | 48 if (nvbios_rd32(bios, dcb + 6) == 0x4edcbdcb) { in dcb_table()
56 if (nvbios_rd32(bios, dcb + 4) == 0x4edcbdcb) { in dcb_table()
128 u32 conn = nvbios_rd32(bios, dcb + 0x00); in dcb_outp_parse()
142 u32 conf = nvbios_rd32(bios, dcb + 0x04); in dcb_outp_parse()
216 if (nvbios_rd32(bios, outp) == 0x00000000) in dcb_outp_foreach()
218 if (nvbios_rd32(bios, outp) == 0xffffffff) in dcb_outp_foreach()
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| D | P0260.c | 37 data = nvbios_rd32(bios, bit_P.offset + 0x60); in nvbios_P0260Te()
75 info->data = nvbios_rd32(bios, data); in nvbios_P0260Ep()
101 info->data = nvbios_rd32(bios, data); in nvbios_P0260Xp()
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| D | npde.c | 35 switch (nvbios_rd32(bios, data + 0x00)) { in nvbios_npdeTe()
41 data, nvbios_rd32(bios, data + 0x00)); in nvbios_npdeTe()
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| D | gpio.c | 94 u32 info = nvbios_rd32(bios, data); in dcb_gpio_parse()
103 u32 info = nvbios_rd32(bios, data + 0); in dcb_gpio_parse()
104 u8 info1 = nvbios_rd32(bios, data + 4); in dcb_gpio_parse()
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| D | pcir.c | 33 switch (nvbios_rd32(bios, data + 0x00)) { in nvbios_pcirTe()
43 data, nvbios_rd32(bios, data + 0x00)); in nvbios_pcirTe()
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| D | M0209.c | 37 data = nvbios_rd32(bios, bit_M.offset + 0x09); in nvbios_M0209Te()
125 info->data[i] = nvbios_rd32(bios, data + off); in nvbios_M0209Sp()
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| D | perf.c | 104 info->core = nvbios_rd32(bios, perf + 0x01) * 10; in nvbios_perfEp()
105 info->memory = nvbios_rd32(bios, perf + 0x05) * 20; in nvbios_perfEp()
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| D | fan.c | 90 fan->pwm_freq = nvbios_rd32(bios, data + 0x0b) & 0xffffff; in nvbios_fan_parse()
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| D | M0205.c | 37 data = nvbios_rd32(bios, bit_M.offset + 0x05); in nvbios_M0205Te()
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| D | i2c.c | 78 u32 ent_value = nvbios_rd32(bios, ent); in dcb_i2c_parse()
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| D | disp.c | 102 info->mask = nvbios_rd32(bios, data + 0x02); in nvbios_outp_parse()
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| D | rammap.c | 111 temp = nvbios_rd32(bios, data + 0x09); in nvbios_rammapEp()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/ |
| D | gm204.c | 41 nvkm_wr32(device, 0x10a184, nvbios_rd32(bios, img + i)); in pmu_code()
59 nvkm_wr32(device, 0x10a1c4, nvbios_rd32(bios, img + i)); in pmu_data()
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| D | nv05.c | 83 u32 scramble = nvbios_rd32(bios, data); in nv05_devinit_meminit()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/include/nvkm/subdev/ |
| D | bios.h | 28 #define nvbios_rd32(b,o) get_unaligned_le32(&(b)->data[(o)]) macro
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ |
| D | gf119.c | 36 u32 data = nvbios_rd32(bios, entry); in gf119_gpio_reset()
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| D | nv50.c | 37 u32 data = nvbios_rd32(bios, entry); in nv50_gpio_reset()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/fb/ |
| D | ramgk104.c | 1416 data = nvbios_rd32(bios, data + 0x10); /* guess u32... */ in gk104_ram_init()
1424 .offset = nvbios_rd32(bios, data), in gk104_ram_init()
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