| /linux-4.4.14/sound/pci/lola/ |
| H A D | lola_proc.c | 64 int i, j, num_clocks; print_clock_widget() local
69 num_clocks = val & 0xff; print_clock_widget()
70 for (i = 0; i < num_clocks; i += 4) { print_clock_widget()
84 if (i + j >= num_clocks) print_clock_widget()
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| /linux-4.4.14/drivers/staging/media/davinci_vpfe/ |
| H A D | vpfe.h | 81 int num_clocks; member in struct:vpfe_config
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| H A D | vpfe_mc_capture.c | 204 for (i = 0; i < vpfe_cfg->num_clocks; i++) { vpfe_disable_clock()
226 if (!vpfe_cfg->num_clocks) vpfe_enable_clock()
229 vpfe_dev->clks = kcalloc(vpfe_cfg->num_clocks, vpfe_enable_clock()
234 for (i = 0; i < vpfe_cfg->num_clocks; i++) { vpfe_enable_clock()
264 for (i = 0; i < vpfe_cfg->num_clocks; i++) vpfe_enable_clock()
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| /linux-4.4.14/drivers/clk/ti/ |
| H A D | clk.c | 436 * @num_clocks: number of clock names in @clk_names
443 void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks) omap2_clk_enable_init_clocks() argument
448 for (i = 0; i < num_clocks; i++) { omap2_clk_enable_init_clocks()
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| H A D | clock.h | 209 void omap2_clk_enable_init_clocks(const char **clk_names, u8 num_clocks);
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| /linux-4.4.14/arch/c6x/platforms/ |
| H A D | pll.c | 352 size_t num_clocks = 0; c6x_clks_init() local
359 num_clocks++; c6x_clks_init()
366 clkdev_add_table(clocks, num_clocks); c6x_clks_init()
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| /linux-4.4.14/drivers/clk/ |
| H A D | clk-si5351.c | 1319 u8 num_parents, num_clocks; si5351_i2c_probe() local
1509 num_clocks = (drvdata->variant == SI5351_VARIANT_A3) ? 3 : 8; si5351_i2c_probe()
1516 drvdata->msynth = devm_kzalloc(&client->dev, num_clocks * si5351_i2c_probe()
1518 drvdata->clkout = devm_kzalloc(&client->dev, num_clocks * si5351_i2c_probe()
1521 drvdata->onecell.clk_num = num_clocks; si5351_i2c_probe()
1523 num_clocks * sizeof(*drvdata->onecell.clks), GFP_KERNEL); si5351_i2c_probe()
1531 for (n = 0; n < num_clocks; n++) { si5351_i2c_probe()
1555 for (n = 0; n < num_clocks; n++) { si5351_i2c_probe()
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| /linux-4.4.14/drivers/clk/ingenic/ |
| H A D | cgu.h | 203 * @num_clocks: the number of entries in clock_info
211 unsigned num_clocks, struct device_node *np);
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| H A D | cgu.c | 647 unsigned num_clocks, struct device_node *np) ingenic_cgu_new()
663 cgu->clocks.clk_num = num_clocks; ingenic_cgu_new()
646 ingenic_cgu_new(const struct ingenic_cgu_clk_info *clock_info, unsigned num_clocks, struct device_node *np) ingenic_cgu_new() argument
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| /linux-4.4.14/drivers/staging/comedi/drivers/ |
| H A D | ni_at_a2150.c | 116 int num_clocks; /* number of available master clock speeds */ member in struct:a2150_board
133 .num_clocks = 4,
139 .num_clocks = 3,
278 glb_index = board->num_clocks - 1; a2150_get_timing()
290 for (j = 0; j < board->num_clocks; j++) { a2150_get_timing()
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| /linux-4.4.14/arch/arm/mach-davinci/ |
| H A D | clock.c | 588 size_t num_clocks = 0; davinci_clk_init() local
630 num_clocks++; davinci_clk_init()
637 clkdev_add_table(clocks, num_clocks); davinci_clk_init()
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| /linux-4.4.14/drivers/media/platform/exynos4-is/ |
| H A D | media-dev.h | 148 int num_clocks; member in struct:fimc_md::cam_clk_provider
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| H A D | media-dev.c | 1213 for (i = 0; i < cp->num_clocks; i++) fimc_md_unregister_clk_provider()
1250 cp->num_clocks++; fimc_md_register_clk_provider()
1253 if (cp->num_clocks == 0) { fimc_md_register_clk_provider()
1259 cp->clk_data.clk_num = cp->num_clocks; fimc_md_register_clk_provider()
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| /linux-4.4.14/drivers/media/platform/s5p-jpeg/ |
| H A D | jpeg-core.c | 2817 for (i = 0; i < jpeg->variant->num_clocks; i++) { s5p_jpeg_probe()
2945 for (i = jpeg->variant->num_clocks - 1; i >= 0; i--) s5p_jpeg_remove()
2958 for (i = jpeg->variant->num_clocks - 1; i >= 0; i--) s5p_jpeg_runtime_suspend()
2970 for (i = 0; i < jpeg->variant->num_clocks; i++) { s5p_jpeg_runtime_resume()
3031 .num_clocks = 1,
3041 .num_clocks = 2,
3051 .num_clocks = 1,
3063 .num_clocks = 1,
3073 .num_clocks = 4,
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| H A D | jpeg-core.h | 147 int num_clocks; member in struct:s5p_jpeg_variant
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| /linux-4.4.14/drivers/gpu/drm/tegra/ |
| H A D | sor.c | 491 unsigned int num_clocks; member in struct:tegra_sor_params
556 error *= params->num_clocks; tegra_sor_compute_params()
595 params.num_clocks = div_u64(link_rate * mode->hdisplay, pclk); tegra_sor_calc_config()
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