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Searched refs:ndiv_int (Results 1 – 7 of 7) sorted by relevance

/linux-4.4.14/drivers/clk/bcm/
Dclk-iproc-armpll.c152 unsigned int ndiv_int, ndiv_frac, ndiv; in __get_ndiv() local
160 ndiv_int = (val >> IPROC_CLK_PLLARM_NDIV_INT_OFFSET_SHIFT) & in __get_ndiv()
162 if (ndiv_int == 0) in __get_ndiv()
163 ndiv_int = 256; in __get_ndiv()
169 ndiv_int = (val >> IPROC_CLK_PLLARMA_NDIV_INT_SHIFT) & in __get_ndiv()
171 if (ndiv_int == 0) in __get_ndiv()
172 ndiv_int = 1024; in __get_ndiv()
178 ndiv = (ndiv_int << 20) | ndiv_frac; in __get_ndiv()
Dclk-iproc-pll.c310 val = readl(pll->control_base + ctrl->ndiv_int.offset); in pll_set_rate()
311 val &= ~(bit_mask(ctrl->ndiv_int.width) << ctrl->ndiv_int.shift); in pll_set_rate()
312 val |= vco->ndiv_int << ctrl->ndiv_int.shift; in pll_set_rate()
313 iproc_pll_write(pll, pll->control_base, ctrl->ndiv_int.offset, val); in pll_set_rate()
369 u64 ndiv, ndiv_int, ndiv_frac; in iproc_pll_recalc_rate() local
387 val = readl(pll->control_base + ctrl->ndiv_int.offset); in iproc_pll_recalc_rate()
388 ndiv_int = (val >> ctrl->ndiv_int.shift) & in iproc_pll_recalc_rate()
389 bit_mask(ctrl->ndiv_int.width); in iproc_pll_recalc_rate()
390 ndiv = ndiv_int << 20; in iproc_pll_recalc_rate()
Dclk-ns2.c46 .ndiv_int = REG_VAL(0x8, 4, 10),
109 .ndiv_int = REG_VAL(0x8, 4, 10),
171 .ndiv_int = REG_VAL(0x8, 4, 10),
233 .ndiv_int = REG_VAL(0x8, 4, 10),
Dclk-iproc.h71 unsigned int ndiv_int; member
147 struct iproc_clk_reg_op ndiv_int; member
Dclk-cygnus.c64 .ndiv_int = REG_VAL(0x10, 20, 10),
123 .ndiv_int = REG_VAL(0x4, 16, 10),
200 .ndiv_int = REG_VAL(0x10, 20, 10),
Dclk-nsp.c50 .ndiv_int = REG_VAL(0x14, 20, 10),
107 .ndiv_int = REG_VAL(0x4, 20, 8),
/linux-4.4.14/drivers/ssb/
Ddriver_chipcommon_pmu.c180 u8 ndiv_int; member
187 { .freq = 12000, .xf = 1, .p1div = 3, .p2div = 22, .ndiv_int = 0x9, .ndiv_frac = 0xFFFFEF, },
188 { .freq = 13000, .xf = 2, .p1div = 1, .p2div = 6, .ndiv_int = 0xb, .ndiv_frac = 0x483483, },
189 { .freq = 14400, .xf = 3, .p1div = 1, .p2div = 10, .ndiv_int = 0xa, .ndiv_frac = 0x1C71C7, },
190 { .freq = 15360, .xf = 4, .p1div = 1, .p2div = 5, .ndiv_int = 0xb, .ndiv_frac = 0x755555, },
191 { .freq = 16200, .xf = 5, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x6E9E06, },
192 { .freq = 16800, .xf = 6, .p1div = 1, .p2div = 10, .ndiv_int = 0x5, .ndiv_frac = 0x3CF3CF, },
193 { .freq = 19200, .xf = 7, .p1div = 1, .p2div = 9, .ndiv_int = 0x5, .ndiv_frac = 0x17B425, },
194 { .freq = 19800, .xf = 8, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0xA57EB, },
195 { .freq = 20000, .xf = 9, .p1div = 1, .p2div = 11, .ndiv_int = 0x4, .ndiv_frac = 0, },
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