Searched refs:mscr (Results 1 – 3 of 3) sorted by relevance
/linux-4.4.14/drivers/net/phy/ |
D | marvell.c | 350 int err, oldpage, mscr; in m88e1121_config_aneg() local 361 mscr = phy_read(phydev, MII_88E1121_PHY_MSCR_REG) & in m88e1121_config_aneg() 365 mscr |= (MII_88E1121_PHY_MSCR_RX_DELAY | in m88e1121_config_aneg() 368 mscr |= MII_88E1121_PHY_MSCR_RX_DELAY; in m88e1121_config_aneg() 370 mscr |= MII_88E1121_PHY_MSCR_TX_DELAY; in m88e1121_config_aneg() 372 err = phy_write(phydev, MII_88E1121_PHY_MSCR_REG, mscr); in m88e1121_config_aneg() 401 int err, oldpage, mscr; in m88e1318_config_aneg() local 410 mscr = phy_read(phydev, MII_88E1318S_PHY_MSCR1_REG); in m88e1318_config_aneg() 411 mscr |= MII_88E1318S_PHY_MSCR1_PAD_ODD; in m88e1318_config_aneg() 413 err = phy_write(phydev, MII_88E1318S_PHY_MSCR1_REG, mscr); in m88e1318_config_aneg()
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/linux-4.4.14/drivers/edac/ |
D | cpc925_edac.c | 896 u32 mscr; in cpc925_get_sdram_scrub_rate() local 899 mscr = __raw_readl(pdata->vbase + REG_MSCR_OFFSET); in cpc925_get_sdram_scrub_rate() 900 si = (mscr & MSCR_SI_MASK) >> MSCR_SI_SHIFT; in cpc925_get_sdram_scrub_rate() 902 edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr); in cpc925_get_sdram_scrub_rate() 904 if (((mscr & MSCR_SCRUB_MOD_MASK) != MSCR_BACKGR_SCRUB) || in cpc925_get_sdram_scrub_rate()
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/linux-4.4.14/drivers/net/ethernet/dlink/ |
D | dl2k.c | 1450 __u16 mscr; in mii_get_media() local 1466 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_get_media() 1468 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { in mii_get_media() 1472 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { in mii_get_media() 1610 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_set_media() 1611 mscr |= MII_MSCR_CFG_ENABLE; in mii_set_media() 1612 mscr &= ~MII_MSCR_CFG_VALUE = 0; in mii_set_media()
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