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Searched refs:mmVGA_HDP_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c514 save->vga_hdp_control = RREG32(mmVGA_HDP_CONTROL); in dce_v8_0_stop_mc_access()
630 WREG32(mmVGA_HDP_CONTROL, save->vga_hdp_control); in dce_v8_0_resume_mc_access()
641 tmp = RREG32(mmVGA_HDP_CONTROL); in dce_v8_0_set_vga_render_state()
646 WREG32(mmVGA_HDP_CONTROL, tmp); in dce_v8_0_set_vga_render_state()
Ddce_v11_0.c554 save->vga_hdp_control = RREG32(mmVGA_HDP_CONTROL); in dce_v11_0_stop_mc_access()
670 WREG32(mmVGA_HDP_CONTROL, save->vga_hdp_control); in dce_v11_0_resume_mc_access()
681 tmp = RREG32(mmVGA_HDP_CONTROL); in dce_v11_0_set_vga_render_state()
686 WREG32(mmVGA_HDP_CONTROL, tmp); in dce_v11_0_set_vga_render_state()
Ddce_v10_0.c566 save->vga_hdp_control = RREG32(mmVGA_HDP_CONTROL); in dce_v10_0_stop_mc_access()
682 WREG32(mmVGA_HDP_CONTROL, save->vga_hdp_control); in dce_v10_0_resume_mc_access()
693 tmp = RREG32(mmVGA_HDP_CONTROL); in dce_v10_0_set_vga_render_state()
698 WREG32(mmVGA_HDP_CONTROL, tmp); in dce_v10_0_set_vga_render_state()
/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_d.h5133 #define mmVGA_HDP_CONTROL 0xca macro
Ddce_11_0_d.h6093 #define mmVGA_HDP_CONTROL 0xca macro
Ddce_10_0_d.h6017 #define mmVGA_HDP_CONTROL 0xca macro