Searched refs:mmUVD_SEMA_TIMEOUT_STATUS (Results 1 – 6 of 6) sorted by relevance
76 #define mmUVD_SEMA_TIMEOUT_STATUS 0x3db0 macro
82 #define mmUVD_SEMA_TIMEOUT_STATUS 0x3db0 macro
83 #define mmUVD_SEMA_TIMEOUT_STATUS 0x3db0 macro
179 amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0)); in uvd_v6_0_hw_init()729 RREG32(mmUVD_SEMA_TIMEOUT_STATUS)); in uvd_v6_0_print_status()
182 amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0)); in uvd_v5_0_hw_init()745 RREG32(mmUVD_SEMA_TIMEOUT_STATUS)); in uvd_v5_0_print_status()
186 amdgpu_ring_write(ring, PACKET0(mmUVD_SEMA_TIMEOUT_STATUS, 0)); in uvd_v4_2_hw_init()798 RREG32(mmUVD_SEMA_TIMEOUT_STATUS)); in uvd_v4_2_print_status()