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Searched refs:mmUVD_RBC_RB_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_d.h73 #define mmUVD_RBC_RB_CNTL 0x3da9 macro
Duvd_5_0_d.h79 #define mmUVD_RBC_RB_CNTL 0x3da9 macro
Duvd_6_0_d.h80 #define mmUVD_RBC_RB_CNTL 0x3da9 macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c403 WREG32(mmUVD_RBC_RB_CNTL, tmp); in uvd_v6_0_start()
423 WREG32_P(mmUVD_RBC_RB_CNTL, 0, ~UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK); in uvd_v6_0_start()
438 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v6_0_stop()
725 RREG32(mmUVD_RBC_RB_CNTL)); in uvd_v6_0_print_status()
Duvd_v5_0.c403 WREG32(mmUVD_RBC_RB_CNTL, tmp); in uvd_v5_0_start()
423 WREG32_P(mmUVD_RBC_RB_CNTL, 0, ~UVD_RBC_RB_CNTL__RB_NO_FETCH_MASK); in uvd_v5_0_start()
438 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v5_0_stop()
741 RREG32(mmUVD_RBC_RB_CNTL)); in uvd_v5_0_print_status()
Duvd_v4_2.c358 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v4_2_start()
379 WREG32_P(mmUVD_RBC_RB_CNTL, rb_bufsz, ~0x11f1f); in uvd_v4_2_start()
394 WREG32(mmUVD_RBC_RB_CNTL, 0x11010101); in uvd_v4_2_stop()
794 RREG32(mmUVD_RBC_RB_CNTL)); in uvd_v4_2_print_status()