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Searched refs:mmUVD_MPC_SET_MUXA1 (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_2_d.h54 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
Duvd_5_0_d.h60 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
Duvd_6_0_d.h61 #define mmUVD_MPC_SET_MUXA1 0x3d7a macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Duvd_v6_0.c341 WREG32(mmUVD_MPC_SET_MUXA1, 0x0); in uvd_v6_0_start()
691 RREG32(mmUVD_MPC_SET_MUXA1)); in uvd_v6_0_print_status()
Duvd_v5_0.c343 WREG32(mmUVD_MPC_SET_MUXA1, 0x0); in uvd_v5_0_start()
699 RREG32(mmUVD_MPC_SET_MUXA1)); in uvd_v5_0_print_status()
Duvd_v4_2.c308 WREG32(mmUVD_MPC_SET_MUXA1, 0x0); in uvd_v4_2_start()
756 RREG32(mmUVD_MPC_SET_MUXA1)); in uvd_v4_2_print_status()