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Searched refs:mmSDMA0_STATUS_REG (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dvi.c402 {mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET, false},
403 {mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET, false},
559 RREG32(mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET)); in vi_print_gpu_status_regs()
562 RREG32(mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET)); in vi_print_gpu_status_regs()
653 tmp = RREG32(mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET); in vi_gpu_check_soft_reset()
659 tmp = RREG32(mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET); in vi_gpu_check_soft_reset()
Dcik.c1048 RREG32(mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET)); in cik_print_gpu_status_regs()
1050 RREG32(mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET)); in cik_print_gpu_status_regs()
1102 tmp = RREG32(mmSDMA0_STATUS_REG + SDMA0_REGISTER_OFFSET); in amdgpu_cik_gpu_check_soft_reset()
1107 tmp = RREG32(mmSDMA0_STATUS_REG + SDMA1_REGISTER_OFFSET); in amdgpu_cik_gpu_check_soft_reset()
Dcik_sdma.c1075 i, RREG32(mmSDMA0_STATUS_REG + sdma_offsets[i])); in cik_sdma_print_status()
Dsdma_v2_4.c1091 i, RREG32(mmSDMA0_STATUS_REG + sdma_offsets[i])); in sdma_v2_4_print_status()
Dsdma_v3_0.c1251 i, RREG32(mmSDMA0_STATUS_REG + sdma_offsets[i])); in sdma_v3_0_print_status()
/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h169 #define mmSDMA0_STATUS_REG 0x340d macro
Doss_3_0_1_d.h166 #define mmSDMA0_STATUS_REG 0x340d macro
Doss_3_0_d.h303 #define mmSDMA0_STATUS_REG 0x340d macro
Doss_2_0_d.h232 #define mmSDMA0_STATUS_REG 0x340d macro