Searched refs:mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL (Results 1 – 7 of 7) sorted by relevance
165 #define mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL 0x3409 macro
162 #define mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL 0x3409 macro
299 #define mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL 0x3409 macro
228 #define mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL 0x3409 macro
421 WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0); in cik_sdma_gfx_resume()1083 i, RREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i])); in cik_sdma_print_status()
462 WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0); in sdma_v2_4_gfx_resume()1097 i, RREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i])); in sdma_v2_4_print_status()
599 WREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i], 0); in sdma_v3_0_gfx_resume()1257 i, RREG32(mmSDMA0_SEM_WAIT_FAIL_TIMER_CNTL + sdma_offsets[i])); in sdma_v3_0_print_status()