Home
last modified time | relevance | path

Searched refs:mmSDMA0_GFX_RB_WPTR (Results 1 – 7 of 7) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dcik_sdma.c173 return (RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me]) & 0x3fffc) >> 2; in cik_sdma_ring_get_wptr()
188 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me], (ring->wptr << 2) & 0x3fffc); in cik_sdma_ring_set_wptr()
434 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0); in cik_sdma_gfx_resume()
448 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2); in cik_sdma_gfx_resume()
1091 i, RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i])); in cik_sdma_print_status()
Dsdma_v2_4.c203 u32 wptr = RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me]) >> 2; in sdma_v2_4_ring_get_wptr()
220 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me], ring->wptr << 2); in sdma_v2_4_ring_set_wptr()
477 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0); in sdma_v2_4_gfx_resume()
491 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2); in sdma_v2_4_gfx_resume()
1105 i, RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i])); in sdma_v2_4_print_status()
Dsdma_v3_0.c306 wptr = RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me]) >> 2; in sdma_v3_0_ring_get_wptr()
330 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[me], ring->wptr << 2); in sdma_v3_0_ring_set_wptr()
614 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], 0); in sdma_v3_0_gfx_resume()
628 WREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i], ring->wptr << 2); in sdma_v3_0_gfx_resume()
1265 i, RREG32(mmSDMA0_GFX_RB_WPTR + sdma_offsets[i])); in sdma_v3_0_print_status()
/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_d.h191 #define mmSDMA0_GFX_RB_WPTR 0x3484 macro
Doss_3_0_1_d.h218 #define mmSDMA0_GFX_RB_WPTR 0x3484 macro
Doss_3_0_d.h343 #define mmSDMA0_GFX_RB_WPTR 0x3484 macro
Doss_2_0_d.h250 #define mmSDMA0_GFX_RB_WPTR 0x3484 macro