Searched refs:mmSDMA0_GFX_RB_BASE_HI (Results 1 – 7 of 7) sorted by relevance
189 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
216 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
341 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
248 #define mmSDMA0_GFX_RB_BASE_HI 0x3482 macro
445 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in cik_sdma_gfx_resume()1099 i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i])); in cik_sdma_print_status()
488 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v2_4_gfx_resume()1113 i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i])); in sdma_v2_4_print_status()
625 WREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i], ring->gpu_addr >> 40); in sdma_v3_0_gfx_resume()1273 i, RREG32(mmSDMA0_GFX_RB_BASE_HI + sdma_offsets[i])); in sdma_v3_0_print_status()