Home
last modified time | relevance | path

Searched refs:mmMC_SEQ_WR_CTL_D0 (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_1_d.h643 #define mmMC_SEQ_WR_CTL_D0 0xa2f macro
Dgmc_8_1_d.h747 #define mmMC_SEQ_WR_CTL_D0 0xa2f macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dci_dpm.c4584 case mmMC_SEQ_WR_CTL_D0: in ci_check_s0_mc_reg_index()
4696 case mmMC_SEQ_WR_CTL_D0: in ci_register_patching_mc_seq()
4785 WREG32(mmMC_SEQ_WR_CTL_D0_LP, RREG32(mmMC_SEQ_WR_CTL_D0)); in ci_initialize_mc_reg_table()
6506 RREG32(mmMC_SEQ_WR_CTL_D0)); in ci_dpm_print_status()