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Searched refs:mmMC_SEQ_RD_CTL_D1_LP (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_1_d.h817 #define mmMC_SEQ_RD_CTL_D1_LP 0xac8 macro
Dgmc_8_1_d.h921 #define mmMC_SEQ_RD_CTL_D1_LP 0xac8 macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dci_dpm.c4582 *out_reg = mmMC_SEQ_RD_CTL_D1_LP; in ci_check_s0_mc_reg_index()
4788 WREG32(mmMC_SEQ_RD_CTL_D1_LP, RREG32(mmMC_SEQ_RD_CTL_D1)); in ci_initialize_mc_reg_table()
6516 RREG32(mmMC_SEQ_RD_CTL_D1_LP)); in ci_dpm_print_status()