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Searched refs:mmMC_SEQ_RAS_TIMING_LP (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_1_d.h812 #define mmMC_SEQ_RAS_TIMING_LP 0xa9b macro
Dgmc_8_1_d.h916 #define mmMC_SEQ_RAS_TIMING_LP 0xa9b macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dci_dpm.c4549 *out_reg = mmMC_SEQ_RAS_TIMING_LP; in ci_check_s0_mc_reg_index()
4772 WREG32(mmMC_SEQ_RAS_TIMING_LP, RREG32(mmMC_SEQ_RAS_TIMING)); in ci_initialize_mc_reg_table()
6452 RREG32(mmMC_SEQ_RAS_TIMING_LP)); in ci_dpm_print_status()