Searched refs:mmHDMI_ACR_48_0 (Results 1 – 6 of 6) sorted by relevance
1694 tmp = RREG32(mmHDMI_ACR_48_0 + dig->afmt->offset); in dce_v11_0_afmt_update_ACR()1696 WREG32(mmHDMI_ACR_48_0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_update_ACR()
1706 tmp = RREG32(mmHDMI_ACR_48_0 + dig->afmt->offset); in dce_v10_0_afmt_update_ACR()1708 WREG32(mmHDMI_ACR_48_0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_update_ACR()
1669 WREG32(mmHDMI_ACR_48_0 + offset, (acr.cts_48khz << HDMI_ACR_48_0__HDMI_ACR_CTS_48__SHIFT)); in dce_v8_0_afmt_update_ACR()
3214 #define mmHDMI_ACR_48_0 0x1c3b macro
3867 #define mmHDMI_ACR_48_0 0x4a32 macro
3994 #define mmHDMI_ACR_48_0 0x4a32 macro