Searched refs:mmHDMI_ACR_44_0 (Results 1 – 6 of 6) sorted by relevance
1687 tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset); in dce_v11_0_afmt_update_ACR()1689 WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp); in dce_v11_0_afmt_update_ACR()
1699 tmp = RREG32(mmHDMI_ACR_44_0 + dig->afmt->offset); in dce_v10_0_afmt_update_ACR()1701 WREG32(mmHDMI_ACR_44_0 + dig->afmt->offset, tmp); in dce_v10_0_afmt_update_ACR()
1666 WREG32(mmHDMI_ACR_44_0 + offset, (acr.cts_44_1khz << HDMI_ACR_44_0__HDMI_ACR_CTS_44__SHIFT)); in dce_v8_0_afmt_update_ACR()
3198 #define mmHDMI_ACR_44_0 0x1c39 macro
3847 #define mmHDMI_ACR_44_0 0x4a30 macro
3978 #define mmHDMI_ACR_44_0 0x4a30 macro