Searched refs:mmCRTC_MASTER_UPDATE_MODE (Results 1 – 2 of 2) sorted by relevance
630 tmp = RREG32(mmCRTC_MASTER_UPDATE_MODE + crtc_offsets[i]); in dce_v11_0_resume_mc_access()633 WREG32(mmCRTC_MASTER_UPDATE_MODE + crtc_offsets[i], tmp); in dce_v11_0_resume_mc_access()2250 WREG32(mmCRTC_MASTER_UPDATE_MODE + amdgpu_crtc->crtc_offset, 3); in dce_v11_0_crtc_do_set_base()
539 #define mmCRTC_MASTER_UPDATE_MODE 0x1bbe macro