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Searched refs:mmCP_ME1_PIPE0_INT_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_7_2_d.h267 #define mmCP_ME1_PIPE0_INT_CNTL 0x3085 macro
Dgfx_7_0_d.h265 #define mmCP_ME1_PIPE0_INT_CNTL 0x3085 macro
Dgfx_8_0_d.h298 #define mmCP_ME1_PIPE0_INT_CNTL 0x3085 macro
Dgfx_8_1_d.h298 #define mmCP_ME1_PIPE0_INT_CNTL 0x3085 macro
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dgfx_v8_0.c4825 mec_int_cntl_reg = mmCP_ME1_PIPE0_INT_CNTL; in gfx_v8_0_set_compute_eop_interrupt_state()
Dgfx_v7_0.c5331 mec_int_cntl_reg = mmCP_ME1_PIPE0_INT_CNTL; in gfx_v7_0_set_compute_eop_interrupt_state()