Searched refs:min_ref_div (Results 1 – 6 of 6) sorted by relevance
299 dcpll->min_ref_div = 2; in radeon_get_clock_info()305 p1pll->min_ref_div = 2; in radeon_get_clock_info()311 p2pll->min_ref_div = 2; in radeon_get_clock_info()320 spll->min_ref_div = 2; in radeon_get_clock_info()329 mpll->min_ref_div = 2; in radeon_get_clock_info()
1011 ref_div_min = pll->min_ref_div; in radeon_compute_pll_avivo()1142 uint32_t min_ref_div = pll->min_ref_div; in radeon_compute_pll_legacy() local1159 DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); in radeon_compute_pll_legacy()1174 min_ref_div = max_ref_div = pll->reference_div; in radeon_compute_pll_legacy()1176 while (min_ref_div < max_ref_div-1) { in radeon_compute_pll_legacy()1177 uint32_t mid = (min_ref_div + max_ref_div) / 2; in radeon_compute_pll_legacy()1182 min_ref_div = mid; in radeon_compute_pll_legacy()1215 for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) { in radeon_compute_pll_legacy()
183 uint32_t min_ref_div; member
143 ref_div_min = pll->min_ref_div; in amdgpu_pll_compute()
200 uint32_t min_ref_div; member
604 ppll->min_ref_div = 2; in amdgpu_atombios_get_clock_info()634 spll->min_ref_div = 2; in amdgpu_atombios_get_clock_info()666 mpll->min_ref_div = 2; in amdgpu_atombios_get_clock_info()