Searched refs:mc_arb_ramcfg (Results 1 – 9 of 9) sorted by relevance
1181 u32 mc_arb_ramcfg; in rv770_gpu_init() local1297 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in rv770_gpu_init()1353 if ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) in rv770_gpu_init()1359 gb_tiling_config |= GROUP_SIZE((mc_arb_ramcfg & BURSTLENGTH_MASK) >> BURSTLENGTH_SHIFT); in rv770_gpu_init()1360 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { in rv770_gpu_init()1365 ROW_TILING(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT)); in rv770_gpu_init()1367 SAMPLE_SPLIT(((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT)); in rv770_gpu_init()
1375 u32 mc_arb_ramcfg; in r700_gfx_init() local1487 mc_arb_ramcfg = RADEON_READ(R700_MC_ARB_RAMCFG); in r700_gfx_init()1509 gb_tiling_config |= R600_BANK_TILING((mc_arb_ramcfg >> R700_NOOFBANK_SHIFT) & R700_NOOFBANK_MASK); in r700_gfx_init()1513 if (((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK) > 3) { in r700_gfx_init()1518 R600_ROW_TILING(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK)); in r700_gfx_init()1520 R600_SAMPLE_SPLIT(((mc_arb_ramcfg >> R700_NOOFROWS_SHIFT) & R700_NOOFROWS_MASK)); in r700_gfx_init()
899 u32 mc_shared_chmap, mc_arb_ramcfg; in cayman_gpu_init() local1025 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in cayman_gpu_init()1027 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in cayman_gpu_init()1078 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in cayman_gpu_init()
3225 u32 mc_shared_chmap, mc_arb_ramcfg; in evergreen_gpu_init() local3493 mc_arb_ramcfg = RREG32(FUS_MC_ARB_RAMCFG); in evergreen_gpu_init()3495 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in evergreen_gpu_init()3524 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in evergreen_gpu_init()
3093 u32 mc_shared_chmap, mc_arb_ramcfg; in si_gpu_init() local3206 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in si_gpu_init()3210 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in si_gpu_init()3258 switch ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) { in si_gpu_init()
3559 u32 mc_shared_chmap, mc_arb_ramcfg; in cik_gpu_init() local3680 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); in cik_gpu_init()3684 tmp = (mc_arb_ramcfg & NOOFCOLS_MASK) >> NOOFCOLS_SHIFT; in cik_gpu_init()3733 ((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT) << 4; in cik_gpu_init()
970 u32 mc_shared_chmap, mc_arb_ramcfg; in gfx_v8_0_gpu_early_init() local1135 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v8_0_gpu_early_init()1136 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v8_0_gpu_early_init()1167 tmp = REG_GET_FIELD(mc_arb_ramcfg, MC_ARB_RAMCFG, NOOFCOLS); in gfx_v8_0_gpu_early_init()
2063 u32 mc_shared_chmap, mc_arb_ramcfg; in gfx_v7_0_gpu_init() local2171 adev->gfx.config.mc_arb_ramcfg = RREG32(mmMC_ARB_RAMCFG); in gfx_v7_0_gpu_init()2172 mc_arb_ramcfg = adev->gfx.config.mc_arb_ramcfg; in gfx_v7_0_gpu_init()2203 tmp = (mc_arb_ramcfg & MC_ARB_RAMCFG__NOOFCOLS_MASK) >> MC_ARB_RAMCFG__NOOFCOLS__SHIFT; in gfx_v7_0_gpu_init()
1164 unsigned mc_arb_ramcfg; member