Searched refs:max_ref_div (Results 1 – 6 of 6) sorted by relevance
300 dcpll->max_ref_div = 0x3ff; in radeon_get_clock_info()306 p1pll->max_ref_div = 0x3ff; in radeon_get_clock_info()312 p2pll->max_ref_div = 0x3ff; in radeon_get_clock_info()321 spll->max_ref_div = 0xff; in radeon_get_clock_info()330 mpll->max_ref_div = 0xff; in radeon_get_clock_info()
1018 ref_div_max = min(pll->max_ref_div, 7u); in radeon_compute_pll_avivo()1020 ref_div_max = pll->max_ref_div; in radeon_compute_pll_avivo()1143 uint32_t max_ref_div = pll->max_ref_div; in radeon_compute_pll_legacy() local1159 DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); in radeon_compute_pll_legacy()1174 min_ref_div = max_ref_div = pll->reference_div; in radeon_compute_pll_legacy()1176 while (min_ref_div < max_ref_div-1) { in radeon_compute_pll_legacy()1177 uint32_t mid = (min_ref_div + max_ref_div) / 2; in radeon_compute_pll_legacy()1180 max_ref_div = mid; in radeon_compute_pll_legacy()1215 for (ref_div = min_ref_div; ref_div <= max_ref_div; ++ref_div) { in radeon_compute_pll_legacy()
184 uint32_t max_ref_div; member
149 ref_div_max = pll->max_ref_div; in amdgpu_pll_compute()
201 uint32_t max_ref_div; member
605 ppll->max_ref_div = 0x3ff; in amdgpu_atombios_get_clock_info()635 spll->max_ref_div = 0xff; in amdgpu_atombios_get_clock_info()667 mpll->max_ref_div = 0xff; in amdgpu_atombios_get_clock_info()