Searched refs:max_limits (Results 1 – 8 of 8) sorted by relevance
1270 const struct radeon_clock_and_voltage_limits *max_limits, in btc_adjust_clock_combinations() argument1283 max_limits->sclk, in btc_adjust_clock_combinations()1290 max_limits->mclk, in btc_adjust_clock_combinations()2099 struct radeon_clock_and_voltage_limits *max_limits; in btc_apply_state_adjust_rules() local2111 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in btc_apply_state_adjust_rules()2113 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in btc_apply_state_adjust_rules()2116 if (ps->high.mclk > max_limits->mclk) in btc_apply_state_adjust_rules()2117 ps->high.mclk = max_limits->mclk; in btc_apply_state_adjust_rules()2118 if (ps->high.sclk > max_limits->sclk) in btc_apply_state_adjust_rules()2119 ps->high.sclk = max_limits->sclk; in btc_apply_state_adjust_rules()[all …]
45 const struct radeon_clock_and_voltage_limits *max_limits,
789 struct radeon_clock_and_voltage_limits *max_limits; in ni_apply_state_adjust_rules() local802 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ni_apply_state_adjust_rules()804 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ni_apply_state_adjust_rules()808 if (ps->performance_levels[i].mclk > max_limits->mclk) in ni_apply_state_adjust_rules()809 ps->performance_levels[i].mclk = max_limits->mclk; in ni_apply_state_adjust_rules()810 if (ps->performance_levels[i].sclk > max_limits->sclk) in ni_apply_state_adjust_rules()811 ps->performance_levels[i].sclk = max_limits->sclk; in ni_apply_state_adjust_rules()812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()814 if (ps->performance_levels[i].vddci > max_limits->vddci) in ni_apply_state_adjust_rules()[all …]
791 struct radeon_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local816 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()818 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()822 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()823 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()824 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()825 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()3901 const struct radeon_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local3905 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()3907 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2992 struct radeon_clock_and_voltage_limits *max_limits; in si_apply_state_adjust_rules() local3039 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in si_apply_state_adjust_rules()3041 max_limits = &rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in si_apply_state_adjust_rules()3049 if (ps->performance_levels[i].mclk > max_limits->mclk) in si_apply_state_adjust_rules()3050 ps->performance_levels[i].mclk = max_limits->mclk; in si_apply_state_adjust_rules()3051 if (ps->performance_levels[i].sclk > max_limits->sclk) in si_apply_state_adjust_rules()3052 ps->performance_levels[i].sclk = max_limits->sclk; in si_apply_state_adjust_rules()3053 if (ps->performance_levels[i].vddc > max_limits->vddc) in si_apply_state_adjust_rules()3054 ps->performance_levels[i].vddc = max_limits->vddc; in si_apply_state_adjust_rules()3055 if (ps->performance_levels[i].vddci > max_limits->vddci) in si_apply_state_adjust_rules()[all …]
2150 struct radeon_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2161 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2165 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2284 struct radeon_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2286 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()
908 struct amdgpu_clock_and_voltage_limits *max_limits; in ci_apply_state_adjust_rules() local933 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_apply_state_adjust_rules()935 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_apply_state_adjust_rules()939 if (ps->performance_levels[i].mclk > max_limits->mclk) in ci_apply_state_adjust_rules()940 ps->performance_levels[i].mclk = max_limits->mclk; in ci_apply_state_adjust_rules()941 if (ps->performance_levels[i].sclk > max_limits->sclk) in ci_apply_state_adjust_rules()942 ps->performance_levels[i].sclk = max_limits->sclk; in ci_apply_state_adjust_rules()4039 const struct amdgpu_clock_and_voltage_limits *max_limits; in ci_enable_uvd_dpm() local4043 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac; in ci_enable_uvd_dpm()4045 max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc; in ci_enable_uvd_dpm()[all …]
2244 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_apply_state_adjust_rules() local2255 mclk = max_limits->mclk; in kv_apply_state_adjust_rules()2259 stable_p_state_sclk = (max_limits->sclk * 75) / 100; in kv_apply_state_adjust_rules()2378 struct amdgpu_clock_and_voltage_limits *max_limits = in kv_calculate_nbps_level_settings() local2380 u32 mclk = max_limits->mclk; in kv_calculate_nbps_level_settings()