Searched refs:mask_base (Results 1 - 42 of 42) sorted by relevance

/linux-4.4.14/drivers/mfd/
H A Dsec-irq.c388 .mask_base = S2MPS11_REG_INT1M,
397 .mask_base = S2MPS14_REG_INT1M, \
416 .mask_base = S2MPU02_REG_INT1M,
426 .mask_base = S5M8767_REG_INT1M,
436 .mask_base = S5M8763_REG_IRQM1,
H A Dintel_soc_pmic_crc.c155 .mask_base = CRYSTAL_COVE_REG_MIRQLVL1,
H A Dmax77686.c153 .mask_base = MAX77686_REG_INT1MSK,
172 .mask_base = MAX77686_RTC_INTM,
181 .mask_base = MAX77802_REG_INT1MSK,
190 .mask_base = MAX77802_RTC_INTM,
H A Dmax77693.c79 .mask_base = MAX77693_LED_REG_FLASH_INT_MASK,
95 .mask_base = MAX77693_PMIC_REG_TOPSYS_INT_MASK,
113 .mask_base = MAX77693_CHG_REG_CHG_INT_MASK,
150 .mask_base = MAX77693_MUIC_REG_INTMASK1,
H A Dmax8907.c135 .mask_base = MAX8907_REG_CHG_IRQ1_MASK,
159 .mask_base = MAX8907_REG_ON_OFF_IRQ1_MASK,
174 .mask_base = MAX8907_REG_RTC_IRQ_MASK,
H A Dretu-mfd.c80 .mask_base = RETU_REG_IMR,
116 .mask_base = TAHVO_REG_IMR,
265 ret = retu_write(rdev, rdat->irq_chip->mask_base, 0xffff); retu_probe()
H A Daxp20x.c409 .mask_base = AXP152_IRQ1_EN,
421 .mask_base = AXP20X_IRQ1_EN,
434 .mask_base = AXP20X_IRQ1_EN,
446 .mask_base = AXP20X_IRQ1_EN,
H A Dda9063-irq.c167 .mask_base = DA9063_REG_IRQ_MASK_A,
H A Drt5033.c35 .mask_base = RT5033_REG_PMIC_IRQ_CTRL,
H A Dmax14577.c222 .mask_base = MAX14577_REG_INTMASK1,
252 .mask_base = MAX14577_REG_INTMASK1,
267 .mask_base = MAX77836_PMIC_REG_TOPSYS_INT_MASK,
H A D88pm805.c186 .mask_base = PM805_INT_MASK1,
H A Dda9052-irq.c172 .mask_base = DA9052_IRQ_MASK_A_REG,
H A Dmax77843.c67 .mask_base = MAX77843_SYS_REG_SYSINTMASK,
H A Drk808.c146 .mask_base = RK808_INT_STS_MSK_REG1,
H A Dtps65090.c140 .mask_base = TPS65090_REG_INTR_MASK,
H A Dwm8994-irq.c138 .mask_base = WM8994_INTERRUPT_STATUS_1_MASK,
H A Dintel_soc_pmic_bxtwc.c122 .mask_base = BXTWC_MIRQLVL1,
131 .mask_base = BXTWC_MTHRM0IRQ,
H A Dtps65910.c214 .mask_base = TPS65910_INT_MSK,
225 .mask_base = TPS65910_INT_MSK,
H A Dpalmas.c312 .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
325 .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
H A Das3722.c218 .mask_base = AS3722_INTERRUPT_MASK1_REG,
H A Dda9055-core.c373 .mask_base = DA9055_REG_IRQ_MASK_A,
H A Dtps65218.c206 .mask_base = TPS65218_REG_INT_MASK1,
H A Dda9062-core.c101 .mask_base = DA9062AA_IRQ_MASK_A,
H A Dda9150-core.c350 .mask_base = DA9150_IRQ_MASK_E,
H A Dmc13xxx-core.c434 mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0; mc13xxx_common_init()
H A D88pm800.c411 .mask_base = PM800_INT_ENA_1,
H A Dtps80031.c123 .mask_base = TPS80031_INT_MSK_LINE_A,
H A Dtwl6040.c615 .mask_base = TWL6040_REG_INTMR,
H A Dwm8997-tables.c54 .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1,
150 .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
H A Dwm5110-tables.c302 .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1,
464 .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
667 .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
H A Dwm5102-tables.c117 .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1,
239 .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
H A Dwm8998-tables.c69 .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1,
172 .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK,
/linux-4.4.14/drivers/base/regmap/
H A Dregmap-irq.c81 reg = d->chip->mask_base + regmap_irq_sync_unlock()
87 /* set mask with mask_base register */ regmap_irq_sync_unlock()
95 d->chip->mask_base; regmap_irq_sync_unlock()
440 reg = chip->mask_base + regmap_add_irq_chip()
447 d->chip->mask_base; regmap_add_irq_chip()
/linux-4.4.14/drivers/pci/
H A Dmsi.c229 writel(mask_bits, desc->mask_base + offset); __pci_msix_desc_mask_irq()
245 readl(desc->mask_base); /* Flush write to device */ msi_set_mask_bit()
285 void __iomem *base = entry->mask_base + __pci_read_msi_msg()
317 base = entry->mask_base + __pci_write_msi_msg()
373 iounmap(entry->mask_base); free_msi_irqs()
697 entry->mask_base = base; msix_setup_entries()
717 entry->masked = readl(entry->mask_base + offset); for_each_pci_msi_entry()
/linux-4.4.14/include/linux/
H A Dmsi.h52 * @mask_base: [PCI MSI-X] Mask register base address
78 void __iomem *mask_base; member in union:msi_desc::__anon12928::__anon12929::__anon12931
H A Dregmap.h808 * @mask_base: Base mask register address.
831 unsigned int mask_base; member in struct:regmap_irq_chip
/linux-4.4.14/drivers/net/usb/
H A Dsmsc75xx.c1462 int mask_base = WUF_MASKX + filter * 16; smsc75xx_write_wuff() local
1471 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1); smsc75xx_write_wuff()
1477 ret = smsc75xx_write_reg(dev, mask_base + 4, 0); smsc75xx_write_wuff()
1483 ret = smsc75xx_write_reg(dev, mask_base + 8, 0); smsc75xx_write_wuff()
1489 ret = smsc75xx_write_reg(dev, mask_base + 12, 0); smsc75xx_write_wuff()
/linux-4.4.14/drivers/extcon/
H A Dextcon-rt8973a.c195 .mask_base = RT8973A_REG_INTM1,
H A Dextcon-sm5502.c191 .mask_base = SM5502_REG_INTMASK1,
H A Dextcon-max77843.c192 .mask_base = MAX77843_MUIC_REG_INTMASK1,
/linux-4.4.14/fs/btrfs/
H A Dioctl.c5455 #define check_feature(root, change_mask, flags, mask_base) \
5456 check_feature_bits(root, FEAT_##mask_base, change_mask, flags, \
5457 BTRFS_FEATURE_ ## mask_base ## _SUPP, \
5458 BTRFS_FEATURE_ ## mask_base ## _SAFE_SET, \
5459 BTRFS_FEATURE_ ## mask_base ## _SAFE_CLEAR)
/linux-4.4.14/sound/soc/codecs/
H A Drt5677.c5090 .mask_base = RT5677_IRQ_CTRL1,

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