Searched refs:lwm (Results 1 - 17 of 17) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/
H A Darb.c39 int lwm; member in struct:nv_fifo_info
106 fifo->lwm = clwm; nv04_calc_arb()
134 pclks = 4; /* lwm detect. */ nv10_calc_arb()
136 nvclks = 3 /* lwm -> sync. */ nv10_calc_arb()
193 fifo->lwm = min_lwm + 10 * (max_lwm - min_lwm) / 100; /* Empirical. */ nv10_calc_arb()
198 int *burst, int *lwm) nv04_update_arb()
236 *lwm = fifo_data.lwm >> 3; nv04_update_arb()
240 nv20_update_arb(int *burst, int *lwm) nv20_update_arb() argument
249 *lwm = graphics_lwm >> 3; nv20_update_arb()
253 nouveau_calc_arb(struct drm_device *dev, int vclk, int bpp, int *burst, int *lwm) nouveau_calc_arb() argument
258 nv04_update_arb(dev, vclk, bpp, burst, lwm); nouveau_calc_arb()
262 *lwm = 0x0480; nouveau_calc_arb()
264 nv20_update_arb(burst, lwm); nouveau_calc_arb()
197 nv04_update_arb(struct drm_device *dev, int VClk, int bpp, int *burst, int *lwm) nv04_update_arb() argument
H A Dhw.h58 int *burst, int *lwm);
H A Dnvreg.h287 # define NV_CIO_CRE_47 0x47 /* extended fifo lwm, used on nv30+ */
/linux-4.4.14/drivers/net/ethernet/mellanox/mlx5/core/
H A Dsrq.c104 MLX5_SET(wq, wq, lwm, MLX5_GET(srqc, srqc, lwm)); rmpc_srqc_reformat()
128 MLX5_SET(srqc, srqc, lwm, MLX5_GET(wq, wq, lwm)); rmpc_srqc_reformat()
185 u16 lwm, int is_srq) arm_srq_cmd()
196 in.lwm = cpu_to_be16(lwm); arm_srq_cmd()
279 struct mlx5_core_srq *srq, u16 lwm) arm_xrc_srq_cmd()
290 MLX5_SET(arm_xrc_srq_in, xrcsrq_in, lwm, lwm); arm_xrc_srq_cmd()
366 u16 lwm) arm_rmp_cmd()
384 MLX5_SET(wq, wq, lwm, lwm); arm_rmp_cmd()
385 MLX5_SET(rmp_bitmask, bitmask, lwm, 1); arm_rmp_cmd()
519 u16 lwm, int is_srq) mlx5_core_arm_srq()
522 return arm_srq_cmd(dev, srq, lwm, is_srq); mlx5_core_arm_srq()
524 return arm_xrc_srq_cmd(dev, srq, lwm); mlx5_core_arm_srq()
526 return arm_rmp_cmd(dev, srq, lwm); mlx5_core_arm_srq()
184 arm_srq_cmd(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq, u16 lwm, int is_srq) arm_srq_cmd() argument
278 arm_xrc_srq_cmd(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq, u16 lwm) arm_xrc_srq_cmd() argument
364 arm_rmp_cmd(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq, u16 lwm) arm_rmp_cmd() argument
518 mlx5_core_arm_srq(struct mlx5_core_dev *dev, struct mlx5_core_srq *srq, u16 lwm, int is_srq) mlx5_core_arm_srq() argument
H A Dtransobj.c272 int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm) mlx5_core_arm_rmp() argument
290 MLX5_SET(wq, wq, lwm, lwm); mlx5_core_arm_rmp()
291 MLX5_SET(rmp_bitmask, bitmask, lwm, 1); mlx5_core_arm_rmp()
356 int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 xsrqn, u16 lwm) mlx5_core_arm_xsrq() argument
366 MLX5_SET(arm_xrc_srq_in, in, lwm, lwm); mlx5_core_arm_xsrq()
H A Dtransobj.h59 int mlx5_core_arm_rmp(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm);
64 int mlx5_core_arm_xsrq(struct mlx5_core_dev *dev, u32 rmpn, u16 lwm);
/linux-4.4.14/fs/jfs/
H A Djfs_xtree.c656 xtlck->lwm.offset = xtInsert()
657 (xtlck->lwm.offset) ? min(index, xtInsert()
658 (int)xtlck->lwm.offset) : index; xtInsert()
659 xtlck->lwm.length = xtInsert()
660 le16_to_cpu(p->header.nextindex) - xtlck->lwm.offset; xtInsert()
747 xtlck->lwm.offset = (xtlck->lwm.offset) ? xtSplitUp()
748 min(skip, (int)xtlck->lwm.offset) : skip; xtSplitUp()
749 xtlck->lwm.length = xtSplitUp()
751 xtlck->lwm.offset; xtSplitUp()
917 xtlck->lwm.offset = (xtlck->lwm.offset) ? xtSplitUp()
918 min(skip, (int)xtlck->lwm.offset) : skip; xtSplitUp()
919 xtlck->lwm.length = xtSplitUp()
921 xtlck->lwm.offset; xtSplitUp()
1025 rxtlck->lwm.offset = XTENTRYSTART; xtSplitPage()
1070 /* rxtlck->lwm.offset = XTENTRYSTART; */ xtSplitPage()
1071 rxtlck->lwm.length = 1; xtSplitPage()
1141 sxtlck->lwm.offset = (sxtlck->lwm.offset) ? xtSplitPage()
1142 min(skip, (int)sxtlck->lwm.offset) : skip; xtSplitPage()
1171 sxtlck->lwm.offset = (sxtlck->lwm.offset) ? xtSplitPage()
1172 min(middle, (int)sxtlck->lwm.offset) : middle; xtSplitPage()
1180 sxtlck->lwm.length = le16_to_cpu(sp->header.nextindex) - xtSplitPage()
1181 sxtlck->lwm.offset; xtSplitPage()
1183 /* rxtlck->lwm.offset = XTENTRYSTART; */ xtSplitPage()
1184 rxtlck->lwm.length = le16_to_cpu(rp->header.nextindex) - xtSplitPage()
1308 xtlck->lwm.offset = XTENTRYSTART; xtSplitRoot()
1309 xtlck->lwm.length = le16_to_cpu(rp->header.nextindex) - xtSplitRoot()
1339 xtlck->lwm.offset = XTENTRYSTART; xtSplitRoot()
1340 xtlck->lwm.length = 1; xtSplitRoot()
1496 xtlck->lwm.offset = xtExtend()
1497 (xtlck->lwm.offset) ? min(index, xtExtend()
1498 (int)xtlck->lwm.offset) : index; xtExtend()
1499 xtlck->lwm.length = xtExtend()
1500 le16_to_cpu(p->header.nextindex) - xtlck->lwm.offset; xtExtend()
1679 xtlck->lwm.offset = (xtlck->lwm.offset) ? xtTailgate()
1680 min(index, (int)xtlck->lwm.offset) : index; xtTailgate()
1681 xtlck->lwm.length = le16_to_cpu(p->header.nextindex) - xtTailgate()
1682 xtlck->lwm.offset; xtTailgate()
2008 xtlck->lwm.offset = (xtlck->lwm.offset) ? xtUpdate()
2009 min(index0, (int)xtlck->lwm.offset) : index0; xtUpdate()
2010 xtlck->lwm.length = xtUpdate()
2012 xtlck->lwm.offset; xtUpdate()
2139 xtlck->lwm.offset = (xtlck->lwm.offset) ? xtUpdate()
2140 min(index0, (int)xtlck->lwm.offset) : index0; xtUpdate()
2141 xtlck->lwm.length = le16_to_cpu(p->header.nextindex) - xtUpdate()
2142 xtlck->lwm.offset; xtUpdate()
2307 xtlck->lwm.offset = xtAppend()
2308 (xtlck->lwm.offset) ? min(index,(int) xtlck->lwm.offset) : index; xtAppend()
2309 xtlck->lwm.length = le16_to_cpu(p->header.nextindex) - xtAppend()
2310 xtlck->lwm.offset; xtAppend()
2384 xtlck->lwm.offset = xtDelete()
2385 (xtlck->lwm.offset) ? min(index, xtlck->lwm.offset) : index; xtDelete()
2518 xtlck->lwm.offset = xtDeleteUp()
2519 (xtlck->lwm.offset) ? min(index, xtDeleteUp()
2520 xtlck->lwm. xtDeleteUp()
2793 /* tlckNEW init xtlck->lwm.offset = XTENTRYSTART; */ xtRelocate()
2802 xtlck->lwm.length = xtRelocate()
2803 le16_to_cpu(p->header.nextindex) - xtlck->lwm.offset; xtRelocate()
2862 xtlck->lwm.offset = min(index, xtlck->lwm.offset); xtRelocate()
2863 xtlck->lwm.length = le16_to_cpu(pp->header.nextindex) - xtRelocate()
2864 xtlck->lwm.offset; xtRelocate()
3366 xtlck->lwm.offset = (xtlck->lwm.offset) ? xtTruncate()
3367 min(index, (int)xtlck->lwm.offset) : index; xtTruncate()
3368 xtlck->lwm.length = index + 1 - xtTruncate()
3369 xtlck->lwm.offset; xtTruncate()
H A Djfs_txnmgr.c789 xtlck->lwm.offset = XTENTRYSTART; txLock()
795 xtlck->lwm.offset = txLock()
798 xtlck->lwm.length = 0; /* ! */ txLock()
1711 int next, lwm, hwm; xtLog() local
1744 * extents (XAD_NEW|XAD_EXTEND) of XAD[lwm:next) from xtLog()
1756 * for alloc of new/extended extents of XAD[lwm:next) xtLog()
1760 lwm = xtlck->lwm.offset; xtLog()
1761 if (lwm == 0) xtLog()
1762 lwm = XTPAGEMAXSLOT; xtLog()
1764 if (lwm == next) xtLog()
1766 if (lwm > next) { xtLog()
1767 jfs_err("xtLog: lwm > next\n"); xtLog()
1772 xadlock->count = next - lwm; xtLog()
1786 PXDaddress(pxd, addressXAD(&p->xad[lwm + i])); xtLog()
1787 PXDlength(pxd, lengthXAD(&p->xad[lwm + i])); xtLog()
1788 p->xad[lwm + i].flag &= xtLog()
1798 xadlock->xdlist = &p->xad[lwm]; xtLog()
1801 jfs_info("xtLog: alloc ip:0x%p mp:0x%p tlck:0x%p lwm:%d " xtLog()
1802 "count:%d", tlck->ip, mp, tlck, lwm, xadlock->count); xtLog()
1904 jfs_info("xtLog: free ip:0x%p mp:0x%p count:%d lwm:2", xtLog()
1927 * lwm - lwm before truncation xtLog()
1943 lwm = xtlck->lwm.offset; xtLog()
1944 if (lwm == 0) xtLog()
1945 lwm = XTPAGEMAXSLOT; xtLog()
1955 * extents (XAD_NEW|XAD_EXTEND) of XAD[lwm:next) from xtLog()
2015 * allocate entries XAD[lwm:next): xtLog()
2017 if (lwm < next) { xtLog()
2019 * for alloc of new/extended extents of XAD[lwm:next) xtLog()
2025 xadlock->count = next - lwm; xtLog()
2026 xadlock->xdlist = &p->xad[lwm]; xtLog()
2029 "lwm:%d next:%d", xtLog()
2030 tlck->ip, mp, xadlock->count, lwm, next); xtLog()
H A Djfs_txnmgr.h198 struct lv lwm; /* 2: low water mark */ member in struct:xtlock
/linux-4.4.14/drivers/video/fbdev/nvidia/
H A Dnv_hw.c383 unsigned *lwm, struct nvidia_par *par) nv4UpdateArbitrationSettings()
411 *lwm = fifo_data.graphics_lwm >> 3; nv4UpdateArbitrationSettings()
443 pclks = 4; /* lwm detect. */ nv10CalcArbitration()
445 nvclks = 3; /* lwm -> sync. */ nv10CalcArbitration()
621 unsigned *lwm, nv10UpdateArbitrationSettings()
651 *lwm = fifo_data.graphics_lwm >> 3; nv10UpdateArbitrationSettings()
658 unsigned int *lwm nv30UpdateArbitrationSettings()
673 *lwm = graphics_lwm >> 3; nv30UpdateArbitrationSettings()
679 unsigned *lwm, nForceUpdateArbitrationSettings()
752 *lwm = fifo_data.graphics_lwm >> 3; nForceUpdateArbitrationSettings()
380 nv4UpdateArbitrationSettings(unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, struct nvidia_par *par) nv4UpdateArbitrationSettings() argument
618 nv10UpdateArbitrationSettings(unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, struct nvidia_par *par) nv10UpdateArbitrationSettings() argument
676 nForceUpdateArbitrationSettings(unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, struct nvidia_par *par) nForceUpdateArbitrationSettings() argument
/linux-4.4.14/drivers/net/ethernet/chelsio/cxgb3/
H A Dxgmac.c347 int hwm, lwm, divisor; t3_mac_set_mtu() local
396 lwm = min(3 * (int)mtu, MAC_RXFIFO_SIZE / 4); t3_mac_set_mtu()
399 v |= V_RXFIFOPAUSELWM(lwm / 8); t3_mac_set_mtu()
421 (hwm - lwm) * 4 / divisor); t3_mac_set_mtu()
/linux-4.4.14/drivers/video/fbdev/riva/
H A Driva_hw.c613 unsigned *lwm, nv3UpdateArbitrationSettings()
645 *lwm = fifo_data.graphics_lwm >> 3; nv3UpdateArbitrationSettings()
649 *lwm = 0x24; nv3UpdateArbitrationSettings()
802 unsigned *lwm, nv4UpdateArbitrationSettings()
836 *lwm = fifo_data.graphics_lwm >> 3; nv4UpdateArbitrationSettings()
876 pclks = 4; /* lwm detect. */ nv10CalcArbitration()
878 nvclks = 3; /* lwm -> sync. */ nv10CalcArbitration()
1065 unsigned *lwm, nv10UpdateArbitrationSettings()
1101 *lwm = fifo_data.graphics_lwm >> 3; nv10UpdateArbitrationSettings()
1110 unsigned *lwm, nForceUpdateArbitrationSettings()
1155 *lwm = fifo_data.graphics_lwm >> 3; nForceUpdateArbitrationSettings()
608 nv3UpdateArbitrationSettings( unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, RIVA_HW_INST *chip ) nv3UpdateArbitrationSettings() argument
797 nv4UpdateArbitrationSettings( unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, RIVA_HW_INST *chip ) nv4UpdateArbitrationSettings() argument
1060 nv10UpdateArbitrationSettings( unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, RIVA_HW_INST *chip ) nv10UpdateArbitrationSettings() argument
1105 nForceUpdateArbitrationSettings( unsigned VClk, unsigned pixelDepth, unsigned *burst, unsigned *lwm, RIVA_HW_INST *chip ) nForceUpdateArbitrationSettings() argument
/linux-4.4.14/include/linux/mlx5/
H A Ddevice.h691 __be16 lwm; member in struct:mlx5_srq_ctx
741 __be16 lwm; member in struct:mlx5_arm_srq_mbox_in
H A Ddriver.h722 u16 lwm, int is_srq);
H A Dmlx5_ifc.h865 u8 lwm[0x10]; member in struct:mlx5_ifc_wq_bits
1898 u8 lwm[0x10]; member in struct:mlx5_ifc_xrc_srqc_bits
2022 u8 lwm[0x10]; member in struct:mlx5_ifc_srqc_bits
4198 u8 lwm[0x1]; member in struct:mlx5_ifc_rmp_bitmask_bits
5747 u8 lwm[0x10]; member in struct:mlx5_ifc_arm_xrc_srq_in_bits
5774 u8 lwm[0x10]; member in struct:mlx5_ifc_arm_rq_in_bits
/linux-4.4.14/drivers/infiniband/hw/mlx5/
H A Dsrq.c384 srq_attr->srq_limit = be16_to_cpu(out->ctx.lwm); mlx5_ib_query_srq()
/linux-4.4.14/arch/powerpc/kernel/
H A Dalign.c290 /* lwm, stmw */ emulate_multiple()

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