Searched refs:lr_desc (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/virt/kvm/arm/
H A Dvgic-v3.c49 struct vgic_lr lr_desc; vgic_v3_get_lr() local
53 lr_desc.irq = val & ICH_LR_VIRTUALID_MASK; vgic_v3_get_lr()
55 lr_desc.irq = val & GICH_LR_VIRTUALID; vgic_v3_get_lr()
57 lr_desc.source = 0; vgic_v3_get_lr()
58 if (lr_desc.irq <= 15 && vgic_v3_get_lr()
60 lr_desc.source = (val >> GICH_LR_PHYSID_CPUID_SHIFT) & 0x7; vgic_v3_get_lr()
62 lr_desc.state = 0; vgic_v3_get_lr()
65 lr_desc.state |= LR_STATE_PENDING; vgic_v3_get_lr()
67 lr_desc.state |= LR_STATE_ACTIVE; vgic_v3_get_lr()
69 lr_desc.state |= LR_EOI_INT; vgic_v3_get_lr()
71 lr_desc.state |= LR_HW; vgic_v3_get_lr()
72 lr_desc.hwirq = (val >> ICH_LR_PHYS_ID_SHIFT) & GENMASK(9, 0); vgic_v3_get_lr()
75 return lr_desc; vgic_v3_get_lr()
79 struct vgic_lr lr_desc) vgic_v3_set_lr()
83 lr_val = lr_desc.irq; vgic_v3_set_lr()
96 if (lr_desc.irq < VGIC_NR_SGIS) vgic_v3_set_lr()
97 lr_val |= (u32)lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT; vgic_v3_set_lr()
103 if (lr_desc.state & LR_STATE_PENDING) vgic_v3_set_lr()
105 if (lr_desc.state & LR_STATE_ACTIVE) vgic_v3_set_lr()
107 if (lr_desc.state & LR_EOI_INT) vgic_v3_set_lr()
109 if (lr_desc.state & LR_HW) { vgic_v3_set_lr()
111 lr_val |= ((u64)lr_desc.hwirq) << ICH_LR_PHYS_ID_SHIFT; vgic_v3_set_lr()
116 if (!(lr_desc.state & LR_STATE_MASK)) vgic_v3_set_lr()
78 vgic_v3_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc) vgic_v3_set_lr() argument
H A Dvgic-v2.c35 struct vgic_lr lr_desc; vgic_v2_get_lr() local
38 lr_desc.irq = val & GICH_LR_VIRTUALID; vgic_v2_get_lr()
39 if (lr_desc.irq <= 15) vgic_v2_get_lr()
40 lr_desc.source = (val >> GICH_LR_PHYSID_CPUID_SHIFT) & 0x7; vgic_v2_get_lr()
42 lr_desc.source = 0; vgic_v2_get_lr()
43 lr_desc.state = 0; vgic_v2_get_lr()
46 lr_desc.state |= LR_STATE_PENDING; vgic_v2_get_lr()
48 lr_desc.state |= LR_STATE_ACTIVE; vgic_v2_get_lr()
50 lr_desc.state |= LR_EOI_INT; vgic_v2_get_lr()
52 lr_desc.state |= LR_HW; vgic_v2_get_lr()
53 lr_desc.hwirq = (val & GICH_LR_PHYSID_CPUID) >> GICH_LR_PHYSID_CPUID_SHIFT; vgic_v2_get_lr()
56 return lr_desc; vgic_v2_get_lr()
60 struct vgic_lr lr_desc) vgic_v2_set_lr()
64 lr_val = lr_desc.irq; vgic_v2_set_lr()
66 if (lr_desc.state & LR_STATE_PENDING) vgic_v2_set_lr()
68 if (lr_desc.state & LR_STATE_ACTIVE) vgic_v2_set_lr()
70 if (lr_desc.state & LR_EOI_INT) vgic_v2_set_lr()
73 if (lr_desc.state & LR_HW) { vgic_v2_set_lr()
75 lr_val |= (u32)lr_desc.hwirq << GICH_LR_PHYSID_CPUID_SHIFT; vgic_v2_set_lr()
78 if (lr_desc.irq < VGIC_NR_SGIS) vgic_v2_set_lr()
79 lr_val |= (lr_desc.source << GICH_LR_PHYSID_CPUID_SHIFT); vgic_v2_set_lr()
83 if (!(lr_desc.state & LR_STATE_MASK)) vgic_v2_set_lr()
59 vgic_v2_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc) vgic_v2_set_lr() argument
H A Dvgic.c110 static void vgic_set_lr(struct kvm_vcpu *vcpu, int lr, struct vgic_lr lr_desc);

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