Searched refs:lb_interrupt_mask (Results 1 – 3 of 3) sorted by relevance
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
D | dce_v11_0.c | 3159 u32 lb_interrupt_mask; in dce_v11_0_set_crtc_vblank_interrupt_state() local 3168 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state() 3169 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v11_0_set_crtc_vblank_interrupt_state() 3171 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state() 3174 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vblank_interrupt_state() 3175 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v11_0_set_crtc_vblank_interrupt_state() 3177 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v11_0_set_crtc_vblank_interrupt_state() 3188 u32 lb_interrupt_mask; in dce_v11_0_set_crtc_vline_interrupt_state() local 3197 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v11_0_set_crtc_vline_interrupt_state() 3198 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v11_0_set_crtc_vline_interrupt_state() [all …]
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D | dce_v10_0.c | 3166 u32 lb_interrupt_mask; in dce_v10_0_set_crtc_vblank_interrupt_state() local 3175 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vblank_interrupt_state() 3176 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v10_0_set_crtc_vblank_interrupt_state() 3178 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vblank_interrupt_state() 3181 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vblank_interrupt_state() 3182 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v10_0_set_crtc_vblank_interrupt_state() 3184 WREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc], lb_interrupt_mask); in dce_v10_0_set_crtc_vblank_interrupt_state() 3195 u32 lb_interrupt_mask; in dce_v10_0_set_crtc_vline_interrupt_state() local 3204 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + crtc_offsets[crtc]); in dce_v10_0_set_crtc_vline_interrupt_state() 3205 lb_interrupt_mask = REG_SET_FIELD(lb_interrupt_mask, LB_INTERRUPT_MASK, in dce_v10_0_set_crtc_vline_interrupt_state() [all …]
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D | dce_v8_0.c | 3074 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local 3107 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 3108 lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK; in dce_v8_0_set_crtc_vblank_interrupt_state() 3109 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state() 3112 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vblank_interrupt_state() 3113 lb_interrupt_mask |= LB_INTERRUPT_MASK__VBLANK_INTERRUPT_MASK_MASK; in dce_v8_0_set_crtc_vblank_interrupt_state() 3114 WREG32(mmLB_INTERRUPT_MASK + reg_block, lb_interrupt_mask); in dce_v8_0_set_crtc_vblank_interrupt_state() 3125 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vline_interrupt_state() local 3158 lb_interrupt_mask = RREG32(mmLB_INTERRUPT_MASK + reg_block); in dce_v8_0_set_crtc_vline_interrupt_state() 3159 lb_interrupt_mask &= ~LB_INTERRUPT_MASK__VLINE_INTERRUPT_MASK_MASK; in dce_v8_0_set_crtc_vline_interrupt_state() [all …]
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