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Searched refs:ictrl (Results 1 – 8 of 8) sorted by relevance

/linux-4.4.14/arch/arc/kernel/
Dintc-arcv2.c37 } ictrl; in arc_init_IRQ() local
39 *(unsigned int *)&ictrl = 0; in arc_init_IRQ()
41 ictrl.save_nr_gpr_pairs = 6; /* r0 to r11 (r12 saved manually) */ in arc_init_IRQ()
42 ictrl.save_blink = 1; in arc_init_IRQ()
43 ictrl.save_lp_regs = 1; /* LP_COUNT, LP_START, LP_END */ in arc_init_IRQ()
44 ictrl.save_u_to_u = 0; /* user ctxt saved on kernel stack */ in arc_init_IRQ()
45 ictrl.save_idx_regs = 1; /* JLI, LDI, EI */ in arc_init_IRQ()
47 WRITE_AUX(AUX_IRQ_CTRL, ictrl); in arc_init_IRQ()
/linux-4.4.14/drivers/scsi/
Dqla1280.c770 RD_REG_WORD(&reg->ictrl), RD_REG_WORD(&reg->istatus)); in qla1280_mailbox_timeout()
872 RD_REG_WORD(&ha->iobase->ictrl), jiffies); in qla1280_error_action()
1090 WRT_REG_WORD(&ha->iobase->ictrl, 0); in qla1280_disable_intrs()
1091 RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ in qla1280_disable_intrs()
1098 WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC)); in qla1280_enable_intrs()
1099 RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ in qla1280_enable_intrs()
1603 WRT_REG_WORD(&reg->ictrl, ISP_RESET); in qla1280_chip_diag()
1613 data = qla1280_debounce_register(&reg->ictrl); in qla1280_chip_diag()
1619 data = RD_REG_WORD(&reg->ictrl); in qla1280_chip_diag()
2730 WRT_REG_WORD(&reg->ictrl, ISP_RESET); in qla1280_reset_adapter()
Dqla1280.h142 uint16_t ictrl; /* Interface control */ member
/linux-4.4.14/drivers/scsi/qla2xxx/
Dqla_dbg.c1107 WRT_REG_DWORD(&reg->ictrl, 0); in qla24xx_fw_dump()
1108 RD_REG_DWORD(&reg->ictrl); in qla24xx_fw_dump()
1380 WRT_REG_DWORD(&reg->ictrl, 0); in qla25xx_fw_dump()
1381 RD_REG_DWORD(&reg->ictrl); in qla25xx_fw_dump()
1701 WRT_REG_DWORD(&reg->ictrl, 0); in qla81xx_fw_dump()
1702 RD_REG_DWORD(&reg->ictrl); in qla81xx_fw_dump()
2044 WRT_REG_DWORD(&reg->ictrl, 0); in qla83xx_fw_dump()
2045 RD_REG_DWORD(&reg->ictrl); in qla83xx_fw_dump()
Dqla_os.c1451 WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC); in qla2x00_enable_intrs()
1452 RD_REG_WORD(&reg->ictrl); in qla2x00_enable_intrs()
1466 WRT_REG_WORD(&reg->ictrl, 0); in qla2x00_disable_intrs()
1467 RD_REG_WORD(&reg->ictrl); in qla2x00_disable_intrs()
1479 WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT); in qla24xx_enable_intrs()
1480 RD_REG_DWORD(&reg->ictrl); in qla24xx_enable_intrs()
1494 WRT_REG_DWORD(&reg->ictrl, 0); in qla24xx_disable_intrs()
1495 RD_REG_DWORD(&reg->ictrl); in qla24xx_disable_intrs()
Dqla_mbx.c268 uint32_t ictrl; in qla2x00_mailbox_command() local
272 ictrl = RD_REG_DWORD(&reg->isp24.ictrl); in qla2x00_mailbox_command()
275 ictrl = RD_REG_WORD(&reg->isp.ictrl); in qla2x00_mailbox_command()
279 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0); in qla2x00_mailbox_command()
386 RD_REG_DWORD(&reg->isp24.ictrl), in qla2x00_mailbox_command()
Dqla_fw.h975 uint32_t ictrl; /* Interrupt control. */ member
Dqla_def.h443 uint16_t ictrl; /* Interrupt control */ member