| /linux-4.4.14/drivers/media/usb/pvrusb2/ |
| H A D | pvrusb2-hdw.c | 32 #include "pvrusb2-hdw.h"
35 #include "pvrusb2-hdw-internal.h"
326 static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v);
334 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);
335 static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw);
336 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
342 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
346 static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw);
347 static v4l2_std_id pvr2_hdw_get_detected_std(struct pvr2_hdw *hdw);
358 struct pvr2_hdw *hdw = cptr->hdw; ctrl_channelfreq_get() local
359 if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) { ctrl_channelfreq_get()
360 *vp = hdw->freqTable[hdw->freqProgSlot-1]; ctrl_channelfreq_get()
369 struct pvr2_hdw *hdw = cptr->hdw; ctrl_channelfreq_set() local
370 unsigned int slotId = hdw->freqProgSlot; ctrl_channelfreq_set()
372 hdw->freqTable[slotId-1] = v; ctrl_channelfreq_set()
376 if (hdw->freqSelector) { ctrl_channelfreq_set()
377 if (hdw->freqSlotRadio == slotId) { ctrl_channelfreq_set()
378 hdw->freqSlotRadio = 0; ctrl_channelfreq_set()
381 if (hdw->freqSlotTelevision == slotId) { ctrl_channelfreq_set()
382 hdw->freqSlotTelevision = 0; ctrl_channelfreq_set()
391 *vp = cptr->hdw->freqProgSlot; ctrl_channelprog_get()
397 struct pvr2_hdw *hdw = cptr->hdw; ctrl_channelprog_set() local
399 hdw->freqProgSlot = v; ctrl_channelprog_set()
406 struct pvr2_hdw *hdw = cptr->hdw; ctrl_channel_get() local
407 *vp = hdw->freqSelector ? hdw->freqSlotRadio : hdw->freqSlotTelevision; ctrl_channel_get()
414 struct pvr2_hdw *hdw = cptr->hdw; ctrl_channel_set() local
417 freq = hdw->freqTable[slotId-1]; ctrl_channel_set()
419 pvr2_hdw_set_cur_freq(hdw,freq); ctrl_channel_set()
421 if (hdw->freqSelector) { ctrl_channel_set()
422 hdw->freqSlotRadio = slotId; ctrl_channel_set()
424 hdw->freqSlotTelevision = slotId; ctrl_channel_set()
431 *vp = pvr2_hdw_get_cur_freq(cptr->hdw); ctrl_freq_get()
437 return cptr->hdw->freqDirty != 0; ctrl_freq_is_dirty()
442 cptr->hdw->freqDirty = 0; ctrl_freq_clear_dirty()
447 pvr2_hdw_set_cur_freq(cptr->hdw,v); ctrl_freq_set()
453 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_cropl_min_get()
454 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_cropl_min_get()
464 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_cropl_max_get()
465 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_cropl_max_get()
470 if (cap->bounds.width > cptr->hdw->cropw_val) { ctrl_cropl_max_get()
471 *left += cap->bounds.width - cptr->hdw->cropw_val; ctrl_cropl_max_get()
478 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_cropt_min_get()
479 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_cropt_min_get()
489 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_cropt_max_get()
490 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_cropt_max_get()
495 if (cap->bounds.height > cptr->hdw->croph_val) { ctrl_cropt_max_get()
496 *top += cap->bounds.height - cptr->hdw->croph_val; ctrl_cropt_max_get()
503 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_cropw_max_get()
506 stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_cropw_max_get()
511 cleft = cptr->hdw->cropl_val; ctrl_cropw_max_get()
519 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_croph_max_get()
522 stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_croph_max_get()
527 ctop = cptr->hdw->cropt_val; ctrl_croph_max_get()
535 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapbl()
536 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapbl()
546 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapbt()
547 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapbt()
557 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapbw()
558 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapbw()
568 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapbh()
569 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapbh()
579 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapdl()
580 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapdl()
590 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapdt()
591 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapdt()
601 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapdw()
602 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapdw()
612 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcapdh()
613 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcapdh()
623 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcappan()
624 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcappan()
634 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info; ctrl_get_cropcappad()
635 int stat = pvr2_hdw_check_cropcap(cptr->hdw); ctrl_get_cropcappad()
646 if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) { ctrl_vres_max_get()
657 if (cptr->hdw->hdw_desc->flag_has_cx25840) { ctrl_vres_min_get()
667 *vp = cptr->hdw->input_val; ctrl_get_input()
673 return ((1 << v) & cptr->hdw->input_allowed_mask) != 0; ctrl_check_input()
678 return pvr2_hdw_set_input(cptr->hdw,v); ctrl_set_input()
683 return cptr->hdw->input_dirty != 0; ctrl_isdirty_input()
688 cptr->hdw->input_dirty = 0; ctrl_cleardirty_input()
695 struct pvr2_hdw *hdw = cptr->hdw; ctrl_freq_max_get() local
696 if (hdw->tuner_signal_stale) { ctrl_freq_max_get()
697 pvr2_hdw_status_poll(hdw); ctrl_freq_max_get()
699 fv = hdw->tuner_signal_info.rangehigh; ctrl_freq_max_get()
705 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { ctrl_freq_max_get()
717 struct pvr2_hdw *hdw = cptr->hdw; ctrl_freq_min_get() local
718 if (hdw->tuner_signal_stale) { ctrl_freq_min_get()
719 pvr2_hdw_status_poll(hdw); ctrl_freq_min_get()
721 fv = hdw->tuner_signal_info.rangelow; ctrl_freq_min_get()
727 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { ctrl_freq_min_get()
738 return cptr->hdw->enc_stale != 0; ctrl_cx2341x_is_dirty()
743 cptr->hdw->enc_stale = 0; ctrl_cx2341x_clear_dirty()
744 cptr->hdw->enc_unsafe_stale = 0; ctrl_cx2341x_clear_dirty()
757 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs, ctrl_cx2341x_get()
767 struct pvr2_hdw *hdw = cptr->hdw; ctrl_cx2341x_set() local
776 ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state, ctrl_cx2341x_set()
777 hdw->state_encoder_run, &cs, ctrl_cx2341x_set()
785 ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state, ctrl_cx2341x_set()
788 if (!ret) hdw->enc_unsafe_stale = !0; ctrl_cx2341x_set()
791 hdw->enc_stale = !0; ctrl_cx2341x_set()
800 cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl); ctrl_cx2341x_getv4lflags()
822 *vp = cptr->hdw->state_pipeline_req; ctrl_streamingenabled_get()
828 *vp = cptr->hdw->master_state; ctrl_masterstate_get()
834 int result = pvr2_hdw_is_hsm(cptr->hdw); ctrl_hsm_get()
843 *vp = pvr2_hdw_get_detected_std(cptr->hdw); ctrl_stddetect_get()
849 *vp = cptr->hdw->std_mask_avail; ctrl_stdavail_get()
855 struct pvr2_hdw *hdw = cptr->hdw; ctrl_stdavail_set() local
857 ns = hdw->std_mask_avail; ctrl_stdavail_set()
859 if (ns == hdw->std_mask_avail) return 0; ctrl_stdavail_set()
860 hdw->std_mask_avail = ns; ctrl_stdavail_set()
861 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail; ctrl_stdavail_set()
888 *vp = cptr->hdw->std_mask_cur; ctrl_stdcur_get()
894 struct pvr2_hdw *hdw = cptr->hdw; ctrl_stdcur_set() local
896 ns = hdw->std_mask_cur; ctrl_stdcur_set()
898 if (ns == hdw->std_mask_cur) return 0; ctrl_stdcur_set()
899 hdw->std_mask_cur = ns; ctrl_stdcur_set()
900 hdw->std_dirty = !0; ctrl_stdcur_set()
906 return cptr->hdw->std_dirty != 0; ctrl_stdcur_is_dirty()
911 cptr->hdw->std_dirty = 0; ctrl_stdcur_clear_dirty()
916 struct pvr2_hdw *hdw = cptr->hdw; ctrl_signal_get() local
917 pvr2_hdw_status_poll(hdw); ctrl_signal_get()
918 *vp = hdw->tuner_signal_info.signal; ctrl_signal_get()
926 struct pvr2_hdw *hdw = cptr->hdw; ctrl_audio_modes_present_get() local
927 pvr2_hdw_status_poll(hdw); ctrl_audio_modes_present_get()
928 subchan = hdw->tuner_signal_info.rxsubchans; ctrl_audio_modes_present_get()
973 {*vp = cptr->hdw->vname##_val; return 0;} \
975 {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \
977 {return cptr->hdw->vname##_dirty != 0;} \
979 {cptr->hdw->vname##_dirty = 0;}
1291 struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw) pvr2_hdw_get_dev() argument
1293 return hdw->usb_dev; pvr2_hdw_get_dev()
1297 unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw) pvr2_hdw_get_sn() argument
1299 return hdw->serial_number; pvr2_hdw_get_sn()
1303 const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *hdw) pvr2_hdw_get_bus_info() argument
1305 return hdw->bus_info; pvr2_hdw_get_bus_info()
1309 const char *pvr2_hdw_get_device_identifier(struct pvr2_hdw *hdw) pvr2_hdw_get_device_identifier() argument
1311 return hdw->identifier; pvr2_hdw_get_device_identifier()
1315 unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw *hdw) pvr2_hdw_get_cur_freq() argument
1317 return hdw->freqSelector ? hdw->freqValTelevision : hdw->freqValRadio; pvr2_hdw_get_cur_freq()
1322 static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *hdw,unsigned long val) pvr2_hdw_set_cur_freq() argument
1324 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { pvr2_hdw_set_cur_freq()
1325 if (hdw->freqSelector) { pvr2_hdw_set_cur_freq()
1327 hdw->freqSelector = 0; pvr2_hdw_set_cur_freq()
1328 hdw->freqDirty = !0; pvr2_hdw_set_cur_freq()
1330 if (hdw->freqValRadio != val) { pvr2_hdw_set_cur_freq()
1331 hdw->freqValRadio = val; pvr2_hdw_set_cur_freq()
1332 hdw->freqSlotRadio = 0; pvr2_hdw_set_cur_freq()
1333 hdw->freqDirty = !0; pvr2_hdw_set_cur_freq()
1336 if (!(hdw->freqSelector)) { pvr2_hdw_set_cur_freq()
1338 hdw->freqSelector = 1; pvr2_hdw_set_cur_freq()
1339 hdw->freqDirty = !0; pvr2_hdw_set_cur_freq()
1341 if (hdw->freqValTelevision != val) { pvr2_hdw_set_cur_freq()
1342 hdw->freqValTelevision = val; pvr2_hdw_set_cur_freq()
1343 hdw->freqSlotTelevision = 0; pvr2_hdw_set_cur_freq()
1344 hdw->freqDirty = !0; pvr2_hdw_set_cur_freq()
1349 int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw) pvr2_hdw_get_unit_number() argument
1351 return hdw->unit_number; pvr2_hdw_get_unit_number()
1361 static int pvr2_locate_firmware(struct pvr2_hdw *hdw, pvr2_locate_firmware() argument
1372 &hdw->usb_dev->dev); pvr2_locate_firmware()
1422 static int pvr2_upload_firmware1(struct pvr2_hdw *hdw) pvr2_upload_firmware1() argument
1431 if (!hdw->hdw_desc->fx2_firmware.cnt) { pvr2_upload_firmware1()
1432 hdw->fw1_state = FW1_STATE_OK; pvr2_upload_firmware1()
1439 hdw->fw1_state = FW1_STATE_FAILED; // default result pvr2_upload_firmware1()
1443 ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller", pvr2_upload_firmware1()
1444 hdw->hdw_desc->fx2_firmware.cnt, pvr2_upload_firmware1()
1445 hdw->hdw_desc->fx2_firmware.lst); pvr2_upload_firmware1()
1447 if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING; pvr2_upload_firmware1()
1451 usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f)); pvr2_upload_firmware1()
1453 pipe = usb_sndctrlpipe(hdw->usb_dev, 0); pvr2_upload_firmware1()
1457 (!(hdw->hdw_desc->flag_fx2_16kb && (fwsize == 0x4000)))) { pvr2_upload_firmware1()
1458 if (hdw->hdw_desc->flag_fx2_16kb) { pvr2_upload_firmware1()
1480 pvr2_hdw_cpureset_assert(hdw,1); pvr2_upload_firmware1()
1488 ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address, pvr2_upload_firmware1()
1495 pvr2_hdw_cpureset_assert(hdw,0); pvr2_upload_firmware1()
1504 hdw->fw1_state = FW1_STATE_RELOAD; pvr2_upload_firmware1()
1519 int pvr2_upload_firmware2(struct pvr2_hdw *hdw) pvr2_upload_firmware2() argument
1531 if (hdw->hdw_desc->flag_skip_cx23416_firmware) { pvr2_upload_firmware2()
1537 ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder", pvr2_upload_firmware2()
1545 hdw->enc_cur_valid = 0; pvr2_upload_firmware2()
1549 del_timer_sync(&hdw->encoder_run_timer); pvr2_upload_firmware2()
1550 if (hdw->state_encoder_runok) { pvr2_upload_firmware2()
1551 hdw->state_encoder_runok = 0; pvr2_upload_firmware2()
1552 trace_stbit("state_encoder_runok",hdw->state_encoder_runok); pvr2_upload_firmware2()
1556 ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/ pvr2_upload_firmware2()
1557 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/ pvr2_upload_firmware2()
1558 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/ pvr2_upload_firmware2()
1559 ret |= pvr2_hdw_cmd_deep_reset(hdw); pvr2_upload_firmware2()
1560 ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/ pvr2_upload_firmware2()
1561 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/ pvr2_upload_firmware2()
1562 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/ pvr2_upload_firmware2()
1563 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/ pvr2_upload_firmware2()
1564 ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/ pvr2_upload_firmware2()
1565 ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/ pvr2_upload_firmware2()
1566 ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/ pvr2_upload_firmware2()
1567 ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/ pvr2_upload_firmware2()
1568 ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/ pvr2_upload_firmware2()
1569 ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/ pvr2_upload_firmware2()
1570 ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/ pvr2_upload_firmware2()
1571 ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/ pvr2_upload_firmware2()
1572 ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_FWPOST1); pvr2_upload_firmware2()
1573 ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16)); pvr2_upload_firmware2()
1605 pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT); pvr2_upload_firmware2()
1627 ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt, pvr2_upload_firmware2()
1648 ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/ pvr2_upload_firmware2()
1649 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/ pvr2_upload_firmware2()
1650 ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16)); pvr2_upload_firmware2()
1658 if (hdw->hdw_desc->signal_routing_scheme == pvr2_upload_firmware2()
1662 pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0); pvr2_upload_firmware2()
1676 static int pvr2_decoder_enable(struct pvr2_hdw *hdw,int enablefl) pvr2_decoder_enable() argument
1684 v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_stream, enablefl); pvr2_decoder_enable()
1685 v4l2_device_call_all(&hdw->v4l2_dev, 0, audio, s_stream, enablefl); pvr2_decoder_enable()
1686 if (hdw->decoder_client_id) { pvr2_decoder_enable()
1692 if (!hdw->flag_decoder_missed) { pvr2_decoder_enable()
1695 hdw->flag_decoder_missed = !0; pvr2_decoder_enable()
1697 hdw->flag_decoder_missed); pvr2_decoder_enable()
1703 int pvr2_hdw_get_state(struct pvr2_hdw *hdw) pvr2_hdw_get_state() argument
1705 return hdw->master_state; pvr2_hdw_get_state()
1709 static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *hdw) pvr2_hdw_untrip_unlocked() argument
1711 if (!hdw->flag_tripped) return 0; pvr2_hdw_untrip_unlocked()
1712 hdw->flag_tripped = 0; pvr2_hdw_untrip_unlocked()
1719 int pvr2_hdw_untrip(struct pvr2_hdw *hdw) pvr2_hdw_untrip() argument
1722 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_untrip()
1723 fl = pvr2_hdw_untrip_unlocked(hdw); pvr2_hdw_untrip()
1724 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_untrip()
1725 if (fl) pvr2_hdw_state_sched(hdw); pvr2_hdw_untrip()
1732 int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw) pvr2_hdw_get_streaming() argument
1734 return hdw->state_pipeline_req != 0; pvr2_hdw_get_streaming()
1738 int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag) pvr2_hdw_set_streaming() argument
1741 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_set_streaming()
1742 pvr2_hdw_untrip_unlocked(hdw); pvr2_hdw_set_streaming()
1743 if ((!enable_flag) != !(hdw->state_pipeline_req)) { pvr2_hdw_set_streaming()
1744 hdw->state_pipeline_req = enable_flag != 0; pvr2_hdw_set_streaming()
1749 pvr2_hdw_state_sched(hdw); pvr2_hdw_set_streaming()
1750 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_set_streaming()
1751 if ((ret = pvr2_hdw_wait(hdw,0)) < 0) return ret; pvr2_hdw_set_streaming()
1753 while ((st = hdw->master_state) != PVR2_STATE_RUN) { pvr2_hdw_set_streaming()
1755 if ((ret = pvr2_hdw_wait(hdw,st)) < 0) return ret; pvr2_hdw_set_streaming()
1762 int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config) pvr2_hdw_set_stream_type() argument
1765 LOCK_TAKE(hdw->big_lock); pvr2_hdw_set_stream_type()
1766 if ((fl = (hdw->desired_stream_type != config)) != 0) { pvr2_hdw_set_stream_type()
1767 hdw->desired_stream_type = config; pvr2_hdw_set_stream_type()
1768 hdw->state_pipeline_config = 0; pvr2_hdw_set_stream_type()
1770 hdw->state_pipeline_config); pvr2_hdw_set_stream_type()
1771 pvr2_hdw_state_sched(hdw); pvr2_hdw_set_stream_type()
1773 LOCK_GIVE(hdw->big_lock); pvr2_hdw_set_stream_type()
1775 return pvr2_hdw_wait(hdw,0); pvr2_hdw_set_stream_type()
1779 static int get_default_tuner_type(struct pvr2_hdw *hdw) get_default_tuner_type() argument
1781 int unit_number = hdw->unit_number; get_default_tuner_type()
1787 hdw->tuner_type = tp; get_default_tuner_type()
1788 hdw->tuner_updated = !0; get_default_tuner_type()
1793 static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw) get_default_standard() argument
1795 int unit_number = hdw->unit_number; get_default_standard()
1805 static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw) get_default_error_tolerance() argument
1807 int unit_number = hdw->unit_number; get_default_error_tolerance()
1816 static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw) pvr2_hdw_check_firmware() argument
1823 LOCK_TAKE(hdw->ctl_lock); do { pvr2_hdw_check_firmware()
1824 hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR; pvr2_hdw_check_firmware()
1825 result = pvr2_send_request_ex(hdw,HZ*1,!0, pvr2_hdw_check_firmware()
1826 hdw->cmd_buffer,1, pvr2_hdw_check_firmware()
1827 hdw->cmd_buffer,1); pvr2_hdw_check_firmware()
1829 } while(0); LOCK_GIVE(hdw->ctl_lock); pvr2_hdw_check_firmware()
1879 static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw) pvr2_hdw_setup_std() argument
1885 std1 = get_default_standard(hdw); pvr2_hdw_setup_std()
1886 std3 = std1 ? 0 : hdw->hdw_desc->default_std_mask; pvr2_hdw_setup_std()
1888 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom); pvr2_hdw_setup_std()
1894 hdw->std_mask_avail = hdw->std_mask_eeprom; pvr2_hdw_setup_std()
1896 std2 = (std1|std3) & ~hdw->std_mask_avail; pvr2_hdw_setup_std()
1903 hdw->std_mask_avail |= std2; pvr2_hdw_setup_std()
1906 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail; pvr2_hdw_setup_std()
1913 hdw->std_mask_cur = std1; pvr2_hdw_setup_std()
1914 hdw->std_dirty = !0; pvr2_hdw_setup_std()
1922 hdw->std_mask_cur = std3; pvr2_hdw_setup_std()
1923 hdw->std_dirty = !0; pvr2_hdw_setup_std()
1932 hdw->std_mask_eeprom) & pvr2_hdw_setup_std()
1935 hdw->std_mask_eeprom)) continue; pvr2_hdw_setup_std()
1941 hdw->std_mask_cur = std_eeprom_maps[idx].std; pvr2_hdw_setup_std()
1942 hdw->std_dirty = !0; pvr2_hdw_setup_std()
1965 static void pvr2_hdw_cx25840_vbi_hack(struct pvr2_hdw *hdw) pvr2_hdw_cx25840_vbi_hack() argument
1977 if (hdw->decoder_client_id != PVR2_CLIENT_ID_CX25840) { pvr2_hdw_cx25840_vbi_hack()
1985 hdw->decoder_client_id); pvr2_hdw_cx25840_vbi_hack()
1990 v4l2_device_call_all(&hdw->v4l2_dev, hdw->decoder_client_id, pvr2_hdw_cx25840_vbi_hack()
1995 static int pvr2_hdw_load_subdev(struct pvr2_hdw *hdw, pvr2_hdw_load_subdev() argument
2013 hdw->hdw_desc->description); pvr2_hdw_load_subdev()
2019 hdw->hdw_desc->description); pvr2_hdw_load_subdev()
2041 mid, fname, hdw->hdw_desc->description); pvr2_hdw_load_subdev()
2050 sd = v4l2_i2c_new_subdev(&hdw->v4l2_dev, &hdw->i2c_adap, pvr2_hdw_load_subdev()
2057 sd = v4l2_i2c_new_subdev(&hdw->v4l2_dev, &hdw->i2c_adap, pvr2_hdw_load_subdev()
2066 mid, fname, hdw->hdw_desc->description); pvr2_hdw_load_subdev()
2082 hdw->decoder_client_id = mid; pvr2_hdw_load_subdev()
2091 static void pvr2_hdw_load_modules(struct pvr2_hdw *hdw) pvr2_hdw_load_modules() argument
2098 cm = &hdw->hdw_desc->client_modules; pvr2_hdw_load_modules()
2103 ct = &hdw->hdw_desc->client_table; pvr2_hdw_load_modules()
2105 if (pvr2_hdw_load_subdev(hdw, &ct->lst[idx]) < 0) okFl = 0; pvr2_hdw_load_modules()
2108 hdw->flag_modulefail = !0; pvr2_hdw_load_modules()
2109 pvr2_hdw_render_useless(hdw); pvr2_hdw_load_modules()
2114 static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw) pvr2_hdw_setup_low() argument
2120 if (hdw->hdw_desc->fx2_firmware.cnt) { pvr2_hdw_setup_low()
2123 (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints pvr2_hdw_setup_low()
2133 reloadFl = !pvr2_hdw_check_firmware(hdw); pvr2_hdw_setup_low()
2142 if (pvr2_upload_firmware1(hdw) != 0) { pvr2_hdw_setup_low()
2149 hdw->fw1_state = FW1_STATE_OK; pvr2_hdw_setup_low()
2151 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2153 hdw->force_dirty = !0; pvr2_hdw_setup_low()
2155 if (!hdw->hdw_desc->flag_no_powerup) { pvr2_hdw_setup_low()
2156 pvr2_hdw_cmd_powerup(hdw); pvr2_hdw_setup_low()
2157 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2161 if (hdw->ir_scheme_active == PVR2_IR_SCHEME_ZILOG) { pvr2_hdw_setup_low()
2162 pvr2_issue_simple_cmd(hdw, pvr2_hdw_setup_low()
2169 pvr2_i2c_core_init(hdw); pvr2_hdw_setup_low()
2170 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2172 pvr2_hdw_load_modules(hdw); pvr2_hdw_setup_low()
2173 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2175 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, load_fw); pvr2_hdw_setup_low()
2178 cptr = hdw->controls + idx; pvr2_hdw_setup_low()
2184 pvr2_hdw_cx25840_vbi_hack(hdw); pvr2_hdw_setup_low()
2191 hdw->freqValTelevision = default_tv_freq; pvr2_hdw_setup_low()
2192 hdw->freqValRadio = default_radio_freq; pvr2_hdw_setup_low()
2198 if (hdw->hdw_desc->flag_has_hauppauge_rom) { pvr2_hdw_setup_low()
2199 ret = pvr2_hdw_get_eeprom_addr(hdw); pvr2_hdw_setup_low()
2200 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2206 hdw->eeprom_addr = ret; pvr2_hdw_setup_low()
2207 pvr2_eeprom_analyze(hdw); pvr2_hdw_setup_low()
2208 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2211 hdw->tuner_type = hdw->hdw_desc->default_tuner_type; pvr2_hdw_setup_low()
2212 hdw->tuner_updated = !0; pvr2_hdw_setup_low()
2213 hdw->std_mask_eeprom = V4L2_STD_ALL; pvr2_hdw_setup_low()
2216 if (hdw->serial_number) { pvr2_hdw_setup_low()
2217 idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1, pvr2_hdw_setup_low()
2218 "sn-%lu", hdw->serial_number); pvr2_hdw_setup_low()
2219 } else if (hdw->unit_number >= 0) { pvr2_hdw_setup_low()
2220 idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1, pvr2_hdw_setup_low()
2222 hdw->unit_number + 'a'); pvr2_hdw_setup_low()
2224 idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1, pvr2_hdw_setup_low()
2227 hdw->identifier[idx] = 0; pvr2_hdw_setup_low()
2229 pvr2_hdw_setup_std(hdw); pvr2_hdw_setup_low()
2231 if (!get_default_tuner_type(hdw)) { pvr2_hdw_setup_low()
2234 hdw->tuner_type); pvr2_hdw_setup_low()
2238 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2240 if (hdw->hdw_desc->signal_routing_scheme == pvr2_hdw_setup_low()
2244 pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0); pvr2_hdw_setup_low()
2247 pvr2_hdw_commit_setup(hdw); pvr2_hdw_setup_low()
2249 hdw->vid_stream = pvr2_stream_create(); pvr2_hdw_setup_low()
2250 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2252 "pvr2_hdw_setup: video stream is %p",hdw->vid_stream); pvr2_hdw_setup_low()
2253 if (hdw->vid_stream) { pvr2_hdw_setup_low()
2254 idx = get_default_error_tolerance(hdw); pvr2_hdw_setup_low()
2259 hdw->vid_stream,idx); pvr2_hdw_setup_low()
2261 pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev, pvr2_hdw_setup_low()
2265 if (!pvr2_hdw_dev_ok(hdw)) return; pvr2_hdw_setup_low()
2267 hdw->flag_init_ok = !0; pvr2_hdw_setup_low()
2269 pvr2_hdw_state_sched(hdw); pvr2_hdw_setup_low()
2276 static void pvr2_hdw_setup(struct pvr2_hdw *hdw) pvr2_hdw_setup() argument
2278 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw); pvr2_hdw_setup()
2280 pvr2_hdw_setup_low(hdw); pvr2_hdw_setup()
2282 "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d", pvr2_hdw_setup()
2283 hdw,pvr2_hdw_dev_ok(hdw),hdw->flag_init_ok); pvr2_hdw_setup()
2284 if (pvr2_hdw_dev_ok(hdw)) { pvr2_hdw_setup()
2285 if (hdw->flag_init_ok) { pvr2_hdw_setup()
2292 if (hdw->fw1_state == FW1_STATE_RELOAD) { pvr2_hdw_setup()
2303 if (hdw->fw1_state == FW1_STATE_MISSING) { pvr2_hdw_setup()
2312 if (hdw->flag_modulefail) { pvr2_hdw_setup()
2335 hdw->fw1_state = FW1_STATE_UNKNOWN; pvr2_hdw_setup()
2336 pvr2_upload_firmware1(hdw); pvr2_hdw_setup()
2350 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw); pvr2_hdw_setup()
2357 int pvr2_hdw_initialize(struct pvr2_hdw *hdw, pvr2_hdw_initialize() argument
2361 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_initialize()
2362 if (hdw->flag_disconnected) { pvr2_hdw_initialize()
2371 hdw->state_data = callback_data; pvr2_hdw_initialize()
2372 hdw->state_func = callback_func; pvr2_hdw_initialize()
2373 pvr2_hdw_setup(hdw); pvr2_hdw_initialize()
2374 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_initialize()
2375 return hdw->flag_init_ok; pvr2_hdw_initialize()
2385 struct pvr2_hdw *hdw = NULL; pvr2_hdw_create() local
2408 hdw = kzalloc(sizeof(*hdw),GFP_KERNEL); pvr2_hdw_create()
2409 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"", pvr2_hdw_create()
2410 hdw,hdw_desc->description); pvr2_hdw_create()
2426 if (!hdw) goto fail; pvr2_hdw_create()
2428 setup_timer(&hdw->quiescent_timer, pvr2_hdw_quiescent_timeout, pvr2_hdw_create()
2429 (unsigned long)hdw); pvr2_hdw_create()
2431 setup_timer(&hdw->decoder_stabilization_timer, pvr2_hdw_create()
2433 (unsigned long)hdw); pvr2_hdw_create()
2435 setup_timer(&hdw->encoder_wait_timer, pvr2_hdw_encoder_wait_timeout, pvr2_hdw_create()
2436 (unsigned long)hdw); pvr2_hdw_create()
2438 setup_timer(&hdw->encoder_run_timer, pvr2_hdw_encoder_run_timeout, pvr2_hdw_create()
2439 (unsigned long)hdw); pvr2_hdw_create()
2441 hdw->master_state = PVR2_STATE_DEAD; pvr2_hdw_create()
2443 init_waitqueue_head(&hdw->state_wait_data); pvr2_hdw_create()
2445 hdw->tuner_signal_stale = !0; pvr2_hdw_create()
2446 cx2341x_fill_defaults(&hdw->enc_ctl_state); pvr2_hdw_create()
2457 hdw->input_avail_mask = m; pvr2_hdw_create()
2458 hdw->input_allowed_mask = hdw->input_avail_mask; pvr2_hdw_create()
2462 if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_DTV))) { pvr2_hdw_create()
2463 hdw->pathway_state = PVR2_PATHWAY_ANALOG; pvr2_hdw_create()
2464 } else if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_TV))) { pvr2_hdw_create()
2465 hdw->pathway_state = PVR2_PATHWAY_DIGITAL; pvr2_hdw_create()
2468 hdw->control_cnt = CTRLDEF_COUNT; pvr2_hdw_create()
2469 hdw->control_cnt += MPEGDEF_COUNT; pvr2_hdw_create()
2470 hdw->controls = kzalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt, pvr2_hdw_create()
2472 if (!hdw->controls) goto fail; pvr2_hdw_create()
2473 hdw->hdw_desc = hdw_desc; pvr2_hdw_create()
2474 hdw->ir_scheme_active = hdw->hdw_desc->ir_scheme; pvr2_hdw_create()
2475 for (idx = 0; idx < hdw->control_cnt; idx++) { pvr2_hdw_create()
2476 cptr = hdw->controls + idx; pvr2_hdw_create()
2477 cptr->hdw = hdw; pvr2_hdw_create()
2480 hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx]; pvr2_hdw_create()
2483 cptr = hdw->controls + idx; pvr2_hdw_create()
2488 m = hdw->input_avail_mask; pvr2_hdw_create()
2491 hdw->input_val = idx; pvr2_hdw_create()
2496 hdw->mpeg_ctrl_info = kcalloc(MPEGDEF_COUNT, pvr2_hdw_create()
2497 sizeof(*(hdw->mpeg_ctrl_info)), pvr2_hdw_create()
2499 if (!hdw->mpeg_ctrl_info) goto fail; pvr2_hdw_create()
2501 cptr = hdw->controls + idx + CTRLDEF_COUNT; pvr2_hdw_create()
2502 ciptr = &(hdw->mpeg_ctrl_info[idx].info); pvr2_hdw_create()
2503 ciptr->desc = hdw->mpeg_ctrl_info[idx].desc; pvr2_hdw_create()
2512 cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl); pvr2_hdw_create()
2516 strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name, pvr2_hdw_create()
2518 hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0; pvr2_hdw_create()
2533 cx2341x_ctrl_get_menu(&hdw->enc_ctl_state, pvr2_hdw_create()
2549 hdw->std_mask_names[idx], pvr2_hdw_create()
2550 sizeof(hdw->std_mask_names[idx])-1, pvr2_hdw_create()
2552 hdw->std_mask_names[idx][cnt1] = 0; pvr2_hdw_create()
2554 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL); pvr2_hdw_create()
2556 memcpy(&hdw->std_info_avail,cptr->info, pvr2_hdw_create()
2557 sizeof(hdw->std_info_avail)); pvr2_hdw_create()
2558 cptr->info = &hdw->std_info_avail; pvr2_hdw_create()
2559 hdw->std_info_avail.def.type_bitmask.bit_names = pvr2_hdw_create()
2560 hdw->std_mask_ptrs; pvr2_hdw_create()
2561 hdw->std_info_avail.def.type_bitmask.valid_bits = pvr2_hdw_create()
2564 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR); pvr2_hdw_create()
2566 memcpy(&hdw->std_info_cur,cptr->info, pvr2_hdw_create()
2567 sizeof(hdw->std_info_cur)); pvr2_hdw_create()
2568 cptr->info = &hdw->std_info_cur; pvr2_hdw_create()
2569 hdw->std_info_cur.def.type_bitmask.bit_names = pvr2_hdw_create()
2570 hdw->std_mask_ptrs; pvr2_hdw_create()
2571 hdw->std_info_cur.def.type_bitmask.valid_bits = pvr2_hdw_create()
2574 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDDETECT); pvr2_hdw_create()
2576 memcpy(&hdw->std_info_detect,cptr->info, pvr2_hdw_create()
2577 sizeof(hdw->std_info_detect)); pvr2_hdw_create()
2578 cptr->info = &hdw->std_info_detect; pvr2_hdw_create()
2579 hdw->std_info_detect.def.type_bitmask.bit_names = pvr2_hdw_create()
2580 hdw->std_mask_ptrs; pvr2_hdw_create()
2581 hdw->std_info_detect.def.type_bitmask.valid_bits = pvr2_hdw_create()
2585 hdw->cropcap_stale = !0; pvr2_hdw_create()
2586 hdw->eeprom_addr = -1; pvr2_hdw_create()
2587 hdw->unit_number = -1; pvr2_hdw_create()
2588 hdw->v4l_minor_number_video = -1; pvr2_hdw_create()
2589 hdw->v4l_minor_number_vbi = -1; pvr2_hdw_create()
2590 hdw->v4l_minor_number_radio = -1; pvr2_hdw_create()
2591 hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL); pvr2_hdw_create()
2592 if (!hdw->ctl_write_buffer) goto fail; pvr2_hdw_create()
2593 hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL); pvr2_hdw_create()
2594 if (!hdw->ctl_read_buffer) goto fail; pvr2_hdw_create()
2595 hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL); pvr2_hdw_create()
2596 if (!hdw->ctl_write_urb) goto fail; pvr2_hdw_create()
2597 hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL); pvr2_hdw_create()
2598 if (!hdw->ctl_read_urb) goto fail; pvr2_hdw_create()
2600 if (v4l2_device_register(&intf->dev, &hdw->v4l2_dev) != 0) { pvr2_hdw_create()
2609 hdw->unit_number = idx; pvr2_hdw_create()
2610 unit_pointers[idx] = hdw; pvr2_hdw_create()
2617 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2"); pvr2_hdw_create()
2619 if (hdw->unit_number >= 0) { pvr2_hdw_create()
2620 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c", pvr2_hdw_create()
2621 ('a' + hdw->unit_number)); pvr2_hdw_create()
2624 if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1; pvr2_hdw_create()
2625 hdw->name[cnt1] = 0; pvr2_hdw_create()
2627 hdw->workqueue = create_singlethread_workqueue(hdw->name); pvr2_hdw_create()
2628 INIT_WORK(&hdw->workpoll,pvr2_hdw_worker_poll); pvr2_hdw_create()
2631 hdw->unit_number,hdw->name); pvr2_hdw_create()
2633 hdw->tuner_type = -1; pvr2_hdw_create()
2634 hdw->flag_ok = !0; pvr2_hdw_create()
2636 hdw->usb_intf = intf; pvr2_hdw_create()
2637 hdw->usb_dev = usb_dev; pvr2_hdw_create()
2639 usb_make_path(hdw->usb_dev, hdw->bus_info, sizeof(hdw->bus_info)); pvr2_hdw_create()
2641 ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber; pvr2_hdw_create()
2642 usb_set_interface(hdw->usb_dev,ifnum,0); pvr2_hdw_create()
2644 mutex_init(&hdw->ctl_lock_mutex); pvr2_hdw_create()
2645 mutex_init(&hdw->big_lock_mutex); pvr2_hdw_create()
2647 return hdw; pvr2_hdw_create()
2649 if (hdw) { pvr2_hdw_create()
2650 del_timer_sync(&hdw->quiescent_timer); pvr2_hdw_create()
2651 del_timer_sync(&hdw->decoder_stabilization_timer); pvr2_hdw_create()
2652 del_timer_sync(&hdw->encoder_run_timer); pvr2_hdw_create()
2653 del_timer_sync(&hdw->encoder_wait_timer); pvr2_hdw_create()
2654 if (hdw->workqueue) { pvr2_hdw_create()
2655 flush_workqueue(hdw->workqueue); pvr2_hdw_create()
2656 destroy_workqueue(hdw->workqueue); pvr2_hdw_create()
2657 hdw->workqueue = NULL; pvr2_hdw_create()
2659 usb_free_urb(hdw->ctl_read_urb); pvr2_hdw_create()
2660 usb_free_urb(hdw->ctl_write_urb); pvr2_hdw_create()
2661 kfree(hdw->ctl_read_buffer); pvr2_hdw_create()
2662 kfree(hdw->ctl_write_buffer); pvr2_hdw_create()
2663 kfree(hdw->controls); pvr2_hdw_create()
2664 kfree(hdw->mpeg_ctrl_info); pvr2_hdw_create()
2665 kfree(hdw); pvr2_hdw_create()
2673 static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw) pvr2_hdw_remove_usb_stuff() argument
2675 if (hdw->flag_disconnected) return; pvr2_hdw_remove_usb_stuff()
2676 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw); pvr2_hdw_remove_usb_stuff()
2677 if (hdw->ctl_read_urb) { pvr2_hdw_remove_usb_stuff()
2678 usb_kill_urb(hdw->ctl_read_urb); pvr2_hdw_remove_usb_stuff()
2679 usb_free_urb(hdw->ctl_read_urb); pvr2_hdw_remove_usb_stuff()
2680 hdw->ctl_read_urb = NULL; pvr2_hdw_remove_usb_stuff()
2682 if (hdw->ctl_write_urb) { pvr2_hdw_remove_usb_stuff()
2683 usb_kill_urb(hdw->ctl_write_urb); pvr2_hdw_remove_usb_stuff()
2684 usb_free_urb(hdw->ctl_write_urb); pvr2_hdw_remove_usb_stuff()
2685 hdw->ctl_write_urb = NULL; pvr2_hdw_remove_usb_stuff()
2687 if (hdw->ctl_read_buffer) { pvr2_hdw_remove_usb_stuff()
2688 kfree(hdw->ctl_read_buffer); pvr2_hdw_remove_usb_stuff()
2689 hdw->ctl_read_buffer = NULL; pvr2_hdw_remove_usb_stuff()
2691 if (hdw->ctl_write_buffer) { pvr2_hdw_remove_usb_stuff()
2692 kfree(hdw->ctl_write_buffer); pvr2_hdw_remove_usb_stuff()
2693 hdw->ctl_write_buffer = NULL; pvr2_hdw_remove_usb_stuff()
2695 hdw->flag_disconnected = !0; pvr2_hdw_remove_usb_stuff()
2699 v4l2_device_disconnect(&hdw->v4l2_dev); pvr2_hdw_remove_usb_stuff()
2700 hdw->usb_dev = NULL; pvr2_hdw_remove_usb_stuff()
2701 hdw->usb_intf = NULL; pvr2_hdw_remove_usb_stuff()
2702 pvr2_hdw_render_useless(hdw); pvr2_hdw_remove_usb_stuff()
2705 void pvr2_hdw_set_v4l2_dev(struct pvr2_hdw *hdw, struct video_device *vdev) pvr2_hdw_set_v4l2_dev() argument
2707 vdev->v4l2_dev = &hdw->v4l2_dev; pvr2_hdw_set_v4l2_dev()
2711 void pvr2_hdw_destroy(struct pvr2_hdw *hdw) pvr2_hdw_destroy() argument
2713 if (!hdw) return; pvr2_hdw_destroy()
2714 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw); pvr2_hdw_destroy()
2715 if (hdw->workqueue) { pvr2_hdw_destroy()
2716 flush_workqueue(hdw->workqueue); pvr2_hdw_destroy()
2717 destroy_workqueue(hdw->workqueue); pvr2_hdw_destroy()
2718 hdw->workqueue = NULL; pvr2_hdw_destroy()
2720 del_timer_sync(&hdw->quiescent_timer); pvr2_hdw_destroy()
2721 del_timer_sync(&hdw->decoder_stabilization_timer); pvr2_hdw_destroy()
2722 del_timer_sync(&hdw->encoder_run_timer); pvr2_hdw_destroy()
2723 del_timer_sync(&hdw->encoder_wait_timer); pvr2_hdw_destroy()
2724 if (hdw->fw_buffer) { pvr2_hdw_destroy()
2725 kfree(hdw->fw_buffer); pvr2_hdw_destroy()
2726 hdw->fw_buffer = NULL; pvr2_hdw_destroy()
2728 if (hdw->vid_stream) { pvr2_hdw_destroy()
2729 pvr2_stream_destroy(hdw->vid_stream); pvr2_hdw_destroy()
2730 hdw->vid_stream = NULL; pvr2_hdw_destroy()
2732 pvr2_i2c_core_done(hdw); pvr2_hdw_destroy()
2733 v4l2_device_unregister(&hdw->v4l2_dev); pvr2_hdw_destroy()
2734 pvr2_hdw_remove_usb_stuff(hdw); pvr2_hdw_destroy()
2737 if ((hdw->unit_number >= 0) && pvr2_hdw_destroy()
2738 (hdw->unit_number < PVR_NUM) && pvr2_hdw_destroy()
2739 (unit_pointers[hdw->unit_number] == hdw)) { pvr2_hdw_destroy()
2740 unit_pointers[hdw->unit_number] = NULL; pvr2_hdw_destroy()
2744 kfree(hdw->controls); pvr2_hdw_destroy()
2745 kfree(hdw->mpeg_ctrl_info); pvr2_hdw_destroy()
2746 kfree(hdw); pvr2_hdw_destroy()
2750 int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw) pvr2_hdw_dev_ok() argument
2752 return (hdw && hdw->flag_ok); pvr2_hdw_dev_ok()
2757 void pvr2_hdw_disconnect(struct pvr2_hdw *hdw) pvr2_hdw_disconnect() argument
2759 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw); pvr2_hdw_disconnect()
2760 LOCK_TAKE(hdw->big_lock); pvr2_hdw_disconnect()
2761 LOCK_TAKE(hdw->ctl_lock); pvr2_hdw_disconnect()
2762 pvr2_hdw_remove_usb_stuff(hdw); pvr2_hdw_disconnect()
2763 LOCK_GIVE(hdw->ctl_lock); pvr2_hdw_disconnect()
2764 LOCK_GIVE(hdw->big_lock); pvr2_hdw_disconnect()
2769 unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw) pvr2_hdw_get_ctrl_count() argument
2771 return hdw->control_cnt; pvr2_hdw_get_ctrl_count()
2776 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw, pvr2_hdw_get_ctrl_by_index() argument
2779 if (idx >= hdw->control_cnt) return NULL; pvr2_hdw_get_ctrl_by_index()
2780 return hdw->controls + idx; pvr2_hdw_get_ctrl_by_index()
2785 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw, pvr2_hdw_get_ctrl_by_id() argument
2793 for (idx = 0; idx < hdw->control_cnt; idx++) { pvr2_hdw_get_ctrl_by_id()
2794 cptr = hdw->controls + idx; pvr2_hdw_get_ctrl_by_id()
2803 struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id) pvr2_hdw_get_ctrl_v4l() argument
2810 for (idx = 0; idx < hdw->control_cnt; idx++) { pvr2_hdw_get_ctrl_v4l()
2811 cptr = hdw->controls + idx; pvr2_hdw_get_ctrl_v4l()
2821 struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw, pvr2_hdw_get_ctrl_nextv4l() argument
2830 for (idx = 0; idx < hdw->control_cnt; idx++) { pvr2_hdw_get_ctrl_nextv4l()
2831 cptr = hdw->controls + idx; pvr2_hdw_get_ctrl_nextv4l()
2855 static void pvr2_subdev_set_control(struct pvr2_hdw *hdw, int id, pvr2_subdev_set_control() argument
2863 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, s_ctrl, &ctrl); pvr2_subdev_set_control()
2866 #define PVR2_SUBDEV_SET_CONTROL(hdw, id, lab) \
2867 if ((hdw)->lab##_dirty || (hdw)->force_dirty) { \
2868 pvr2_subdev_set_control(hdw, id, #lab, (hdw)->lab##_val); \
2871 static v4l2_std_id pvr2_hdw_get_detected_std(struct pvr2_hdw *hdw) pvr2_hdw_get_detected_std() argument
2874 std = (v4l2_std_id)hdw->std_mask_avail; pvr2_hdw_get_detected_std()
2875 v4l2_device_call_all(&hdw->v4l2_dev, 0, pvr2_hdw_get_detected_std()
2882 static void pvr2_subdev_update(struct pvr2_hdw *hdw) pvr2_subdev_update() argument
2890 if (hdw->tuner_updated || hdw->force_dirty) { pvr2_subdev_update()
2893 hdw->tuner_type); pvr2_subdev_update()
2894 if (((int)(hdw->tuner_type)) >= 0) { pvr2_subdev_update()
2897 setup.type = hdw->tuner_type; pvr2_subdev_update()
2899 v4l2_device_call_all(&hdw->v4l2_dev, 0, pvr2_subdev_update()
2904 if (hdw->input_dirty || hdw->std_dirty || hdw->force_dirty) { pvr2_subdev_update()
2906 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { pvr2_subdev_update()
2907 v4l2_device_call_all(&hdw->v4l2_dev, 0, pvr2_subdev_update()
2911 vs = hdw->std_mask_cur; pvr2_subdev_update()
2912 v4l2_device_call_all(&hdw->v4l2_dev, 0, pvr2_subdev_update()
2914 pvr2_hdw_cx25840_vbi_hack(hdw); pvr2_subdev_update()
2916 hdw->tuner_signal_stale = !0; pvr2_subdev_update()
2917 hdw->cropcap_stale = !0; pvr2_subdev_update()
2920 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_BRIGHTNESS, brightness); pvr2_subdev_update()
2921 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_CONTRAST, contrast); pvr2_subdev_update()
2922 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_SATURATION, saturation); pvr2_subdev_update()
2923 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_HUE, hue); pvr2_subdev_update()
2924 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_MUTE, mute); pvr2_subdev_update()
2925 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_VOLUME, volume); pvr2_subdev_update()
2926 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BALANCE, balance); pvr2_subdev_update()
2927 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BASS, bass); pvr2_subdev_update()
2928 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_TREBLE, treble); pvr2_subdev_update()
2930 if (hdw->input_dirty || hdw->audiomode_dirty || hdw->force_dirty) { pvr2_subdev_update()
2933 vt.type = (hdw->input_val == PVR2_CVAL_INPUT_RADIO) ? pvr2_subdev_update()
2935 vt.audmode = hdw->audiomode_val; pvr2_subdev_update()
2936 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt); pvr2_subdev_update()
2939 if (hdw->freqDirty || hdw->force_dirty) { pvr2_subdev_update()
2942 fv = pvr2_hdw_get_cur_freq(hdw); pvr2_subdev_update()
2944 if (hdw->tuner_signal_stale) pvr2_hdw_status_poll(hdw); pvr2_subdev_update()
2946 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) { pvr2_subdev_update()
2954 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { pvr2_subdev_update()
2960 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, pvr2_subdev_update()
2964 if (hdw->res_hor_dirty || hdw->res_ver_dirty || hdw->force_dirty) { pvr2_subdev_update()
2969 format.format.width = hdw->res_hor_val; pvr2_subdev_update()
2970 format.format.height = hdw->res_ver_val; pvr2_subdev_update()
2974 v4l2_device_call_all(&hdw->v4l2_dev, 0, pad, set_fmt, pvr2_subdev_update()
2978 if (hdw->srate_dirty || hdw->force_dirty) { pvr2_subdev_update()
2981 hdw->srate_val); pvr2_subdev_update()
2982 switch (hdw->srate_val) { pvr2_subdev_update()
2994 v4l2_device_call_all(&hdw->v4l2_dev, 0, pvr2_subdev_update()
3001 v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) { pvr2_subdev_update()
3006 (*fp)(hdw, sd); pvr2_subdev_update()
3009 if (hdw->tuner_signal_stale || hdw->cropcap_stale) { pvr2_subdev_update()
3010 pvr2_hdw_status_poll(hdw); pvr2_subdev_update()
3018 static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw) pvr2_hdw_commit_setup() argument
3023 int commit_flag = hdw->force_dirty; pvr2_hdw_commit_setup()
3027 for (idx = 0; idx < hdw->control_cnt; idx++) { pvr2_hdw_commit_setup()
3028 cptr = hdw->controls + idx; pvr2_hdw_commit_setup()
3054 hdw->state_pipeline_config = 0; pvr2_hdw_commit_setup()
3055 trace_stbit("state_pipeline_config",hdw->state_pipeline_config); pvr2_hdw_commit_setup()
3056 pvr2_hdw_state_sched(hdw); pvr2_hdw_commit_setup()
3067 static int pvr2_hdw_commit_execute(struct pvr2_hdw *hdw) pvr2_hdw_commit_execute() argument
3073 if (hdw->input_dirty && hdw->state_pathway_ok && pvr2_hdw_commit_execute()
3074 (((hdw->input_val == PVR2_CVAL_INPUT_DTV) ? pvr2_hdw_commit_execute()
3076 hdw->pathway_state)) { pvr2_hdw_commit_execute()
3078 hdw->state_pathway_ok = 0; pvr2_hdw_commit_execute()
3079 trace_stbit("state_pathway_ok", hdw->state_pathway_ok); pvr2_hdw_commit_execute()
3081 if (!hdw->state_pathway_ok) { pvr2_hdw_commit_execute()
3088 if (hdw->std_dirty) { pvr2_hdw_commit_execute()
3091 if (hdw->std_mask_cur & V4L2_STD_525_60) { pvr2_hdw_commit_execute()
3100 if (nvres != hdw->res_ver_val) { pvr2_hdw_commit_execute()
3101 hdw->res_ver_val = nvres; pvr2_hdw_commit_execute()
3102 hdw->res_ver_dirty = !0; pvr2_hdw_commit_execute()
3106 if (gop_size != hdw->enc_ctl_state.video_gop_size) { pvr2_hdw_commit_execute()
3115 cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs, pvr2_hdw_commit_execute()
3126 if (hdw->res_hor_dirty && hdw->cropw_val < hdw->res_hor_val) { pvr2_hdw_commit_execute()
3127 hdw->cropw_val = hdw->res_hor_val; pvr2_hdw_commit_execute()
3128 hdw->cropw_dirty = !0; pvr2_hdw_commit_execute()
3129 } else if (hdw->cropw_dirty) { pvr2_hdw_commit_execute()
3130 hdw->res_hor_dirty = !0; /* must rescale */ pvr2_hdw_commit_execute()
3131 hdw->res_hor_val = min(720, hdw->cropw_val); pvr2_hdw_commit_execute()
3133 if (hdw->res_ver_dirty && hdw->croph_val < hdw->res_ver_val) { pvr2_hdw_commit_execute()
3134 hdw->croph_val = hdw->res_ver_val; pvr2_hdw_commit_execute()
3135 hdw->croph_dirty = !0; pvr2_hdw_commit_execute()
3136 } else if (hdw->croph_dirty) { pvr2_hdw_commit_execute()
3137 int nvres = hdw->std_mask_cur & V4L2_STD_525_60 ? 480 : 576; pvr2_hdw_commit_execute()
3138 hdw->res_ver_dirty = !0; pvr2_hdw_commit_execute()
3139 hdw->res_ver_val = min(nvres, hdw->croph_val); pvr2_hdw_commit_execute()
3147 (hdw->std_dirty || pvr2_hdw_commit_execute()
3148 hdw->enc_unsafe_stale || pvr2_hdw_commit_execute()
3149 hdw->srate_dirty || pvr2_hdw_commit_execute()
3150 hdw->res_ver_dirty || pvr2_hdw_commit_execute()
3151 hdw->res_hor_dirty || pvr2_hdw_commit_execute()
3152 hdw->cropw_dirty || pvr2_hdw_commit_execute()
3153 hdw->croph_dirty || pvr2_hdw_commit_execute()
3154 hdw->input_dirty || pvr2_hdw_commit_execute()
3155 (hdw->active_stream_type != hdw->desired_stream_type)); pvr2_hdw_commit_execute()
3156 if (disruptive_change && !hdw->state_pipeline_idle) { pvr2_hdw_commit_execute()
3160 hdw->state_pipeline_pause = !0; pvr2_hdw_commit_execute()
3164 if (hdw->srate_dirty) { pvr2_hdw_commit_execute()
3176 c1.value = hdw->srate_val; pvr2_hdw_commit_execute()
3177 cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,VIDIOC_S_EXT_CTRLS); pvr2_hdw_commit_execute()
3180 if (hdw->active_stream_type != hdw->desired_stream_type) { pvr2_hdw_commit_execute()
3182 hdw->active_stream_type = hdw->desired_stream_type; pvr2_hdw_commit_execute()
3185 if (hdw->hdw_desc->signal_routing_scheme == pvr2_hdw_commit_execute()
3189 pvr2_hdw_gpio_get_out(hdw,&b); pvr2_hdw_commit_execute()
3190 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { pvr2_hdw_commit_execute()
3192 pvr2_hdw_gpio_chg_out(hdw,(1 << 11),~0); pvr2_hdw_commit_execute()
3195 pvr2_hdw_gpio_chg_out(hdw,(1 << 11),0); pvr2_hdw_commit_execute()
3200 pvr2_subdev_update(hdw); pvr2_hdw_commit_execute()
3202 hdw->tuner_updated = 0; pvr2_hdw_commit_execute()
3203 hdw->force_dirty = 0; pvr2_hdw_commit_execute()
3204 for (idx = 0; idx < hdw->control_cnt; idx++) { pvr2_hdw_commit_execute()
3205 cptr = hdw->controls + idx; pvr2_hdw_commit_execute()
3210 if ((hdw->pathway_state == PVR2_PATHWAY_ANALOG) && pvr2_hdw_commit_execute()
3211 hdw->state_encoder_run) { pvr2_hdw_commit_execute()
3215 if (pvr2_encoder_adjust(hdw) < 0) return !0; pvr2_hdw_commit_execute()
3218 hdw->state_pipeline_config = !0; pvr2_hdw_commit_execute()
3222 trace_stbit("state_pipeline_config",hdw->state_pipeline_config); pvr2_hdw_commit_execute()
3227 int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw) pvr2_hdw_commit_ctl() argument
3230 LOCK_TAKE(hdw->big_lock); pvr2_hdw_commit_ctl()
3231 fl = pvr2_hdw_commit_setup(hdw); pvr2_hdw_commit_ctl()
3232 LOCK_GIVE(hdw->big_lock); pvr2_hdw_commit_ctl()
3234 return pvr2_hdw_wait(hdw,0); pvr2_hdw_commit_ctl()
3241 struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,workpoll); pvr2_hdw_worker_poll() local
3242 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_worker_poll()
3243 fl = pvr2_hdw_state_eval(hdw); pvr2_hdw_worker_poll()
3244 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_worker_poll()
3245 if (fl && hdw->state_func) { pvr2_hdw_worker_poll()
3246 hdw->state_func(hdw->state_data); pvr2_hdw_worker_poll()
3251 static int pvr2_hdw_wait(struct pvr2_hdw *hdw,int state) pvr2_hdw_wait() argument
3254 hdw->state_wait_data, pvr2_hdw_wait()
3255 (hdw->state_stale == 0) && pvr2_hdw_wait()
3256 (!state || (hdw->master_state != state))); pvr2_hdw_wait()
3261 const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw) pvr2_hdw_get_driver_name() argument
3263 return hdw->name; pvr2_hdw_get_driver_name()
3267 const char *pvr2_hdw_get_desc(struct pvr2_hdw *hdw) pvr2_hdw_get_desc() argument
3269 return hdw->hdw_desc->description; pvr2_hdw_get_desc()
3273 const char *pvr2_hdw_get_type(struct pvr2_hdw *hdw) pvr2_hdw_get_type() argument
3275 return hdw->hdw_desc->shortname; pvr2_hdw_get_type()
3279 int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw) pvr2_hdw_is_hsm() argument
3282 LOCK_TAKE(hdw->ctl_lock); do { pvr2_hdw_is_hsm()
3283 hdw->cmd_buffer[0] = FX2CMD_GET_USB_SPEED; pvr2_hdw_is_hsm()
3284 result = pvr2_send_request(hdw, pvr2_hdw_is_hsm()
3285 hdw->cmd_buffer,1, pvr2_hdw_is_hsm()
3286 hdw->cmd_buffer,1); pvr2_hdw_is_hsm()
3288 result = (hdw->cmd_buffer[0] != 0); pvr2_hdw_is_hsm()
3289 } while(0); LOCK_GIVE(hdw->ctl_lock); pvr2_hdw_is_hsm()
3295 void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *hdw) pvr2_hdw_execute_tuner_poll() argument
3297 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_execute_tuner_poll()
3298 pvr2_hdw_status_poll(hdw); pvr2_hdw_execute_tuner_poll()
3299 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_execute_tuner_poll()
3303 static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw) pvr2_hdw_check_cropcap() argument
3305 if (!hdw->cropcap_stale) { pvr2_hdw_check_cropcap()
3308 pvr2_hdw_status_poll(hdw); pvr2_hdw_check_cropcap()
3309 if (hdw->cropcap_stale) { pvr2_hdw_check_cropcap()
3317 int pvr2_hdw_get_cropcap(struct pvr2_hdw *hdw, struct v4l2_cropcap *pp) pvr2_hdw_get_cropcap() argument
3320 LOCK_TAKE(hdw->big_lock); pvr2_hdw_get_cropcap()
3321 stat = pvr2_hdw_check_cropcap(hdw); pvr2_hdw_get_cropcap()
3323 memcpy(pp, &hdw->cropcap_info, sizeof(hdw->cropcap_info)); pvr2_hdw_get_cropcap()
3325 LOCK_GIVE(hdw->big_lock); pvr2_hdw_get_cropcap()
3331 int pvr2_hdw_get_tuner_status(struct pvr2_hdw *hdw,struct v4l2_tuner *vtp) pvr2_hdw_get_tuner_status() argument
3333 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_get_tuner_status()
3334 if (hdw->tuner_signal_stale) { pvr2_hdw_get_tuner_status()
3335 pvr2_hdw_status_poll(hdw); pvr2_hdw_get_tuner_status()
3337 memcpy(vtp,&hdw->tuner_signal_info,sizeof(struct v4l2_tuner)); pvr2_hdw_get_tuner_status()
3338 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_get_tuner_status()
3350 void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw) pvr2_hdw_trigger_module_log() argument
3352 int nr = pvr2_hdw_get_unit_number(hdw); pvr2_hdw_trigger_module_log()
3353 LOCK_TAKE(hdw->big_lock); pvr2_hdw_trigger_module_log()
3356 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, log_status); pvr2_hdw_trigger_module_log()
3358 cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2"); pvr2_hdw_trigger_module_log()
3359 pvr2_hdw_state_log_state(hdw); pvr2_hdw_trigger_module_log()
3362 LOCK_GIVE(hdw->big_lock); pvr2_hdw_trigger_module_log()
3369 static u8 *pvr2_full_eeprom_fetch(struct pvr2_hdw *hdw) pvr2_full_eeprom_fetch() argument
3389 hdw->eeprom_addr); pvr2_full_eeprom_fetch()
3390 addr = hdw->eeprom_addr; pvr2_full_eeprom_fetch()
3429 if ((ret = i2c_transfer(&hdw->i2c_adap, pvr2_full_eeprom_fetch()
3441 void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw, pvr2_hdw_cpufw_set_enabled() argument
3448 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_cpufw_set_enabled()
3449 if ((hdw->fw_buffer == NULL) == !enable_flag) break; pvr2_hdw_cpufw_set_enabled()
3454 kfree(hdw->fw_buffer); pvr2_hdw_cpufw_set_enabled()
3455 hdw->fw_buffer = NULL; pvr2_hdw_cpufw_set_enabled()
3456 hdw->fw_size = 0; pvr2_hdw_cpufw_set_enabled()
3457 if (hdw->fw_cpu_flag) { pvr2_hdw_cpufw_set_enabled()
3460 pvr2_hdw_cpureset_assert(hdw,0); pvr2_hdw_cpufw_set_enabled()
3465 hdw->fw_cpu_flag = (mode != 2); pvr2_hdw_cpufw_set_enabled()
3466 if (hdw->fw_cpu_flag) { pvr2_hdw_cpufw_set_enabled()
3467 hdw->fw_size = (mode == 1) ? 0x4000 : 0x2000; pvr2_hdw_cpufw_set_enabled()
3470 " (size=%u)", hdw->fw_size); pvr2_hdw_cpufw_set_enabled()
3471 hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL); pvr2_hdw_cpufw_set_enabled()
3472 if (!hdw->fw_buffer) { pvr2_hdw_cpufw_set_enabled()
3473 hdw->fw_size = 0; pvr2_hdw_cpufw_set_enabled()
3478 pvr2_hdw_cpureset_assert(hdw,1); pvr2_hdw_cpufw_set_enabled()
3485 pipe = usb_rcvctrlpipe(hdw->usb_dev, 0); pvr2_hdw_cpufw_set_enabled()
3486 for(address = 0; address < hdw->fw_size; pvr2_hdw_cpufw_set_enabled()
3488 ret = usb_control_msg(hdw->usb_dev,pipe, pvr2_hdw_cpufw_set_enabled()
3491 hdw->fw_buffer+address, pvr2_hdw_cpufw_set_enabled()
3501 hdw->fw_buffer = pvr2_full_eeprom_fetch(hdw); pvr2_hdw_cpufw_set_enabled()
3502 if (!hdw->fw_buffer) { pvr2_hdw_cpufw_set_enabled()
3507 hdw->fw_size = EEPROM_SIZE; pvr2_hdw_cpufw_set_enabled()
3512 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_cpufw_set_enabled()
3517 int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw) pvr2_hdw_cpufw_get_enabled() argument
3519 return hdw->fw_buffer != NULL; pvr2_hdw_cpufw_get_enabled()
3523 int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs, pvr2_hdw_cpufw_get() argument
3527 LOCK_TAKE(hdw->big_lock); do { pvr2_hdw_cpufw_get()
3531 if (!hdw->fw_buffer) { pvr2_hdw_cpufw_get()
3536 if (offs >= hdw->fw_size) { pvr2_hdw_cpufw_get()
3544 if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs; pvr2_hdw_cpufw_get()
3546 memcpy(buf,hdw->fw_buffer+offs,cnt); pvr2_hdw_cpufw_get()
3552 } while (0); LOCK_GIVE(hdw->big_lock); pvr2_hdw_cpufw_get()
3558 int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw, pvr2_hdw_v4l_get_minor_number() argument
3562 case pvr2_v4l_type_video: return hdw->v4l_minor_number_video; pvr2_hdw_v4l_get_minor_number()
3563 case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi; pvr2_hdw_v4l_get_minor_number()
3564 case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio; pvr2_hdw_v4l_get_minor_number()
3571 void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw, pvr2_hdw_v4l_store_minor_number() argument
3575 case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v;break; pvr2_hdw_v4l_store_minor_number()
3576 case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v;break; pvr2_hdw_v4l_store_minor_number()
3577 case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v;break; pvr2_hdw_v4l_store_minor_number()
3585 struct pvr2_hdw *hdw = urb->context; pvr2_ctl_write_complete() local
3586 hdw->ctl_write_pend_flag = 0; pvr2_ctl_write_complete()
3587 if (hdw->ctl_read_pend_flag) return; pvr2_ctl_write_complete()
3588 complete(&hdw->ctl_done); pvr2_ctl_write_complete()
3594 struct pvr2_hdw *hdw = urb->context; pvr2_ctl_read_complete() local
3595 hdw->ctl_read_pend_flag = 0; pvr2_ctl_read_complete()
3596 if (hdw->ctl_write_pend_flag) return; pvr2_ctl_read_complete()
3597 complete(&hdw->ctl_done); pvr2_ctl_read_complete()
3603 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; pvr2_ctl_timeout() local
3604 if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) { pvr2_ctl_timeout()
3605 hdw->ctl_timeout_flag = !0; pvr2_ctl_timeout()
3606 if (hdw->ctl_write_pend_flag) pvr2_ctl_timeout()
3607 usb_unlink_urb(hdw->ctl_write_urb); pvr2_ctl_timeout()
3608 if (hdw->ctl_read_pend_flag) pvr2_ctl_timeout()
3609 usb_unlink_urb(hdw->ctl_read_urb); pvr2_ctl_timeout()
3618 static int pvr2_send_request_ex(struct pvr2_hdw *hdw, pvr2_send_request_ex() argument
3626 if (!hdw->ctl_lock_held) { pvr2_send_request_ex()
3632 if (!hdw->flag_ok && !probe_fl) { pvr2_send_request_ex()
3638 if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) { pvr2_send_request_ex()
3674 hdw->cmd_debug_state = 1; pvr2_send_request_ex()
3676 hdw->cmd_debug_code = ((unsigned char *)write_data)[0]; pvr2_send_request_ex()
3678 hdw->cmd_debug_code = 0; pvr2_send_request_ex()
3680 hdw->cmd_debug_write_len = write_len; pvr2_send_request_ex()
3681 hdw->cmd_debug_read_len = read_len; pvr2_send_request_ex()
3684 init_completion(&hdw->ctl_done); pvr2_send_request_ex()
3685 hdw->ctl_timeout_flag = 0; pvr2_send_request_ex()
3686 hdw->ctl_write_pend_flag = 0; pvr2_send_request_ex()
3687 hdw->ctl_read_pend_flag = 0; pvr2_send_request_ex()
3688 setup_timer(&timer, pvr2_ctl_timeout, (unsigned long)hdw); pvr2_send_request_ex()
3692 hdw->cmd_debug_state = 2; pvr2_send_request_ex()
3695 hdw->ctl_write_buffer[idx] = pvr2_send_request_ex()
3699 usb_fill_bulk_urb(hdw->ctl_write_urb, pvr2_send_request_ex()
3700 hdw->usb_dev, pvr2_send_request_ex()
3701 usb_sndbulkpipe(hdw->usb_dev, pvr2_send_request_ex()
3703 hdw->ctl_write_buffer, pvr2_send_request_ex()
3706 hdw); pvr2_send_request_ex()
3707 hdw->ctl_write_urb->actual_length = 0; pvr2_send_request_ex()
3708 hdw->ctl_write_pend_flag = !0; pvr2_send_request_ex()
3709 status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL); pvr2_send_request_ex()
3714 hdw->ctl_write_pend_flag = 0; pvr2_send_request_ex()
3720 hdw->cmd_debug_state = 3; pvr2_send_request_ex()
3721 memset(hdw->ctl_read_buffer,0x43,read_len); pvr2_send_request_ex()
3723 usb_fill_bulk_urb(hdw->ctl_read_urb, pvr2_send_request_ex()
3724 hdw->usb_dev, pvr2_send_request_ex()
3725 usb_rcvbulkpipe(hdw->usb_dev, pvr2_send_request_ex()
3727 hdw->ctl_read_buffer, pvr2_send_request_ex()
3730 hdw); pvr2_send_request_ex()
3731 hdw->ctl_read_urb->actual_length = 0; pvr2_send_request_ex()
3732 hdw->ctl_read_pend_flag = !0; pvr2_send_request_ex()
3733 status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL); pvr2_send_request_ex()
3738 hdw->ctl_read_pend_flag = 0; pvr2_send_request_ex()
3747 hdw->cmd_debug_state = 4; pvr2_send_request_ex()
3748 while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) { pvr2_send_request_ex()
3749 wait_for_completion(&hdw->ctl_done); pvr2_send_request_ex()
3751 hdw->cmd_debug_state = 5; pvr2_send_request_ex()
3756 hdw->cmd_debug_state = 6; pvr2_send_request_ex()
3759 if (hdw->ctl_timeout_flag) { pvr2_send_request_ex()
3770 if ((hdw->ctl_write_urb->status != 0) && pvr2_send_request_ex()
3771 (hdw->ctl_write_urb->status != -ENOENT) && pvr2_send_request_ex()
3772 (hdw->ctl_write_urb->status != -ESHUTDOWN) && pvr2_send_request_ex()
3773 (hdw->ctl_write_urb->status != -ECONNRESET)) { pvr2_send_request_ex()
3776 status = hdw->ctl_write_urb->status; pvr2_send_request_ex()
3785 if (hdw->ctl_write_urb->actual_length < write_len) { pvr2_send_request_ex()
3793 hdw->ctl_write_urb->actual_length); pvr2_send_request_ex()
3800 if ((hdw->ctl_read_urb->status != 0) && pvr2_send_request_ex()
3801 (hdw->ctl_read_urb->status != -ENOENT) && pvr2_send_request_ex()
3802 (hdw->ctl_read_urb->status != -ESHUTDOWN) && pvr2_send_request_ex()
3803 (hdw->ctl_read_urb->status != -ECONNRESET)) { pvr2_send_request_ex()
3806 status = hdw->ctl_read_urb->status; pvr2_send_request_ex()
3815 if (hdw->ctl_read_urb->actual_length < read_len) { pvr2_send_request_ex()
3823 hdw->ctl_read_urb->actual_length); pvr2_send_request_ex()
3830 hdw->ctl_read_buffer[idx]; pvr2_send_request_ex()
3836 hdw->cmd_debug_state = 0; pvr2_send_request_ex()
3838 pvr2_hdw_render_useless(hdw); pvr2_send_request_ex()
3844 int pvr2_send_request(struct pvr2_hdw *hdw, pvr2_send_request() argument
3848 return pvr2_send_request_ex(hdw,HZ*4,0, pvr2_send_request()
3854 static int pvr2_issue_simple_cmd(struct pvr2_hdw *hdw,u32 cmdcode) pvr2_issue_simple_cmd() argument
3859 LOCK_TAKE(hdw->ctl_lock); pvr2_issue_simple_cmd()
3860 hdw->cmd_buffer[0] = cmdcode & 0xffu; pvr2_issue_simple_cmd()
3865 hdw->cmd_buffer[1] = (cmdcode >> 16) & 0xffu; pvr2_issue_simple_cmd()
3867 hdw->cmd_buffer[2] = (cmdcode >> 24) & 0xffu; pvr2_issue_simple_cmd()
3893 " (%u",hdw->cmd_buffer[1]); pvr2_issue_simple_cmd()
3898 ",%u",hdw->cmd_buffer[2]); pvr2_issue_simple_cmd()
3908 ret = pvr2_send_request(hdw,hdw->cmd_buffer,cnt,NULL,0); pvr2_issue_simple_cmd()
3909 LOCK_GIVE(hdw->ctl_lock); pvr2_issue_simple_cmd()
3914 int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data) pvr2_write_register() argument
3918 LOCK_TAKE(hdw->ctl_lock); pvr2_write_register()
3920 hdw->cmd_buffer[0] = FX2CMD_REG_WRITE; /* write register prefix */ pvr2_write_register()
3921 PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data); pvr2_write_register()
3922 hdw->cmd_buffer[5] = 0; pvr2_write_register()
3923 hdw->cmd_buffer[6] = (reg >> 8) & 0xff; pvr2_write_register()
3924 hdw->cmd_buffer[7] = reg & 0xff; pvr2_write_register()
3927 ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0); pvr2_write_register()
3929 LOCK_GIVE(hdw->ctl_lock); pvr2_write_register()
3935 static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data) pvr2_read_register() argument
3939 LOCK_TAKE(hdw->ctl_lock); pvr2_read_register()
3941 hdw->cmd_buffer[0] = FX2CMD_REG_READ; /* read register prefix */ pvr2_read_register()
3942 hdw->cmd_buffer[1] = 0; pvr2_read_register()
3943 hdw->cmd_buffer[2] = 0; pvr2_read_register()
3944 hdw->cmd_buffer[3] = 0; pvr2_read_register()
3945 hdw->cmd_buffer[4] = 0; pvr2_read_register()
3946 hdw->cmd_buffer[5] = 0; pvr2_read_register()
3947 hdw->cmd_buffer[6] = (reg >> 8) & 0xff; pvr2_read_register()
3948 hdw->cmd_buffer[7] = reg & 0xff; pvr2_read_register()
3950 ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4); pvr2_read_register()
3951 *data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0); pvr2_read_register()
3953 LOCK_GIVE(hdw->ctl_lock); pvr2_read_register()
3959 void pvr2_hdw_render_useless(struct pvr2_hdw *hdw) pvr2_hdw_render_useless() argument
3961 if (!hdw->flag_ok) return; pvr2_hdw_render_useless()
3964 if (hdw->vid_stream) { pvr2_hdw_render_useless()
3965 pvr2_stream_setup(hdw->vid_stream,NULL,0,0); pvr2_hdw_render_useless()
3967 hdw->flag_ok = 0; pvr2_hdw_render_useless()
3968 trace_stbit("flag_ok",hdw->flag_ok); pvr2_hdw_render_useless()
3969 pvr2_hdw_state_sched(hdw); pvr2_hdw_render_useless()
3973 void pvr2_hdw_device_reset(struct pvr2_hdw *hdw) pvr2_hdw_device_reset() argument
3977 ret = usb_lock_device_for_reset(hdw->usb_dev,NULL); pvr2_hdw_device_reset()
3979 ret = usb_reset_device(hdw->usb_dev); pvr2_hdw_device_reset()
3980 usb_unlock_device(hdw->usb_dev); pvr2_hdw_device_reset()
3995 void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val) pvr2_hdw_cpureset_assert() argument
4001 if (!hdw->usb_dev) return; pvr2_hdw_cpureset_assert()
4017 pipe = usb_sndctrlpipe(hdw->usb_dev, 0); pvr2_hdw_cpureset_assert()
4018 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ); pvr2_hdw_cpureset_assert()
4022 pvr2_hdw_render_useless(hdw); pvr2_hdw_cpureset_assert()
4029 int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw) pvr2_hdw_cmd_deep_reset() argument
4031 return pvr2_issue_simple_cmd(hdw,FX2CMD_DEEP_RESET); pvr2_hdw_cmd_deep_reset()
4035 int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw) pvr2_hdw_cmd_powerup() argument
4037 return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_ON); pvr2_hdw_cmd_powerup()
4042 int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw) pvr2_hdw_cmd_decoder_reset() argument
4046 if (hdw->decoder_client_id) { pvr2_hdw_cmd_decoder_reset()
4047 v4l2_device_call_all(&hdw->v4l2_dev, hdw->decoder_client_id, pvr2_hdw_cmd_decoder_reset()
4049 pvr2_hdw_cx25840_vbi_hack(hdw); pvr2_hdw_cmd_decoder_reset()
4058 static int pvr2_hdw_cmd_hcw_demod_reset(struct pvr2_hdw *hdw, int onoff) pvr2_hdw_cmd_hcw_demod_reset() argument
4060 hdw->flag_ok = !0; pvr2_hdw_cmd_hcw_demod_reset()
4061 return pvr2_issue_simple_cmd(hdw, pvr2_hdw_cmd_hcw_demod_reset()
4068 static int pvr2_hdw_cmd_onair_fe_power_ctrl(struct pvr2_hdw *hdw, int onoff) pvr2_hdw_cmd_onair_fe_power_ctrl() argument
4070 hdw->flag_ok = !0; pvr2_hdw_cmd_onair_fe_power_ctrl()
4071 return pvr2_issue_simple_cmd(hdw,(onoff ? pvr2_hdw_cmd_onair_fe_power_ctrl()
4077 static int pvr2_hdw_cmd_onair_digital_path_ctrl(struct pvr2_hdw *hdw, pvr2_hdw_cmd_onair_digital_path_ctrl() argument
4080 return pvr2_issue_simple_cmd(hdw,(onoff ? pvr2_hdw_cmd_onair_digital_path_ctrl()
4086 static void pvr2_hdw_cmd_modeswitch(struct pvr2_hdw *hdw,int digitalFl) pvr2_hdw_cmd_modeswitch() argument
4092 if (cmode == hdw->pathway_state) { pvr2_hdw_cmd_modeswitch()
4097 switch (hdw->hdw_desc->digital_control_scheme) { pvr2_hdw_cmd_modeswitch()
4099 pvr2_hdw_cmd_hcw_demod_reset(hdw,digitalFl); pvr2_hdw_cmd_modeswitch()
4105 pvr2_hdw_cmd_decoder_reset(hdw); pvr2_hdw_cmd_modeswitch()
4112 pvr2_hdw_cmd_onair_fe_power_ctrl(hdw,digitalFl); pvr2_hdw_cmd_modeswitch()
4117 pvr2_hdw_untrip_unlocked(hdw); pvr2_hdw_cmd_modeswitch()
4118 hdw->pathway_state = cmode; pvr2_hdw_cmd_modeswitch()
4122 static void pvr2_led_ctrl_hauppauge(struct pvr2_hdw *hdw, int onoff) pvr2_led_ctrl_hauppauge() argument
4131 pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000481); pvr2_led_ctrl_hauppauge()
4133 pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000401); pvr2_led_ctrl_hauppauge()
4135 pvr2_hdw_gpio_chg_out(hdw, 0xffffffff, 0x00000000); pvr2_led_ctrl_hauppauge()
4147 static void pvr2_led_ctrl(struct pvr2_hdw *hdw,int onoff) pvr2_led_ctrl() argument
4152 if ((!onoff) == (!hdw->led_on)) return; pvr2_led_ctrl()
4154 hdw->led_on = onoff != 0; pvr2_led_ctrl()
4156 scheme_id = hdw->hdw_desc->led_scheme; pvr2_led_ctrl()
4163 if (fp) (*fp)(hdw,onoff); pvr2_led_ctrl()
4168 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl) pvr2_hdw_cmd_usbstream() argument
4174 if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) { pvr2_hdw_cmd_usbstream()
4175 return pvr2_issue_simple_cmd(hdw, pvr2_hdw_cmd_usbstream()
4182 if (hdw->pathway_state != PVR2_PATHWAY_DIGITAL) { pvr2_hdw_cmd_usbstream()
4191 switch (hdw->hdw_desc->digital_control_scheme) { pvr2_hdw_cmd_usbstream()
4193 return pvr2_issue_simple_cmd(hdw, pvr2_hdw_cmd_usbstream()
4198 ret = pvr2_issue_simple_cmd(hdw, pvr2_hdw_cmd_usbstream()
4203 return pvr2_hdw_cmd_onair_digital_path_ctrl(hdw,runFl); pvr2_hdw_cmd_usbstream()
4211 static int state_eval_pathway_ok(struct pvr2_hdw *hdw) state_eval_pathway_ok() argument
4213 if (hdw->state_pathway_ok) { state_eval_pathway_ok()
4217 if (!hdw->state_pipeline_idle) { state_eval_pathway_ok()
4221 pvr2_hdw_cmd_modeswitch(hdw,hdw->input_val == PVR2_CVAL_INPUT_DTV); state_eval_pathway_ok()
4222 hdw->state_pathway_ok = !0; state_eval_pathway_ok()
4223 trace_stbit("state_pathway_ok",hdw->state_pathway_ok); state_eval_pathway_ok()
4229 static int state_eval_encoder_ok(struct pvr2_hdw *hdw) state_eval_encoder_ok() argument
4231 if (hdw->state_encoder_ok) return 0; state_eval_encoder_ok()
4232 if (hdw->flag_tripped) return 0; state_eval_encoder_ok()
4233 if (hdw->state_encoder_run) return 0; state_eval_encoder_ok()
4234 if (hdw->state_encoder_config) return 0; state_eval_encoder_ok()
4235 if (hdw->state_decoder_run) return 0; state_eval_encoder_ok()
4236 if (hdw->state_usbstream_run) return 0; state_eval_encoder_ok()
4237 if (hdw->pathway_state == PVR2_PATHWAY_DIGITAL) { state_eval_encoder_ok()
4238 if (!hdw->hdw_desc->flag_digital_requires_cx23416) return 0; state_eval_encoder_ok()
4239 } else if (hdw->pathway_state != PVR2_PATHWAY_ANALOG) { state_eval_encoder_ok()
4243 if (pvr2_upload_firmware2(hdw) < 0) { state_eval_encoder_ok()
4244 hdw->flag_tripped = !0; state_eval_encoder_ok()
4245 trace_stbit("flag_tripped",hdw->flag_tripped); state_eval_encoder_ok()
4248 hdw->state_encoder_ok = !0; state_eval_encoder_ok()
4249 trace_stbit("state_encoder_ok",hdw->state_encoder_ok); state_eval_encoder_ok()
4255 static int state_eval_encoder_config(struct pvr2_hdw *hdw) state_eval_encoder_config() argument
4257 if (hdw->state_encoder_config) { state_eval_encoder_config()
4258 if (hdw->state_encoder_ok) { state_eval_encoder_config()
4259 if (hdw->state_pipeline_req && state_eval_encoder_config()
4260 !hdw->state_pipeline_pause) return 0; state_eval_encoder_config()
4262 hdw->state_encoder_config = 0; state_eval_encoder_config()
4263 hdw->state_encoder_waitok = 0; state_eval_encoder_config()
4264 trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok); state_eval_encoder_config()
4266 del_timer_sync(&hdw->encoder_wait_timer); state_eval_encoder_config()
4268 if (!hdw->state_pathway_ok || state_eval_encoder_config()
4269 (hdw->pathway_state != PVR2_PATHWAY_ANALOG) || state_eval_encoder_config()
4270 !hdw->state_encoder_ok || state_eval_encoder_config()
4271 !hdw->state_pipeline_idle || state_eval_encoder_config()
4272 hdw->state_pipeline_pause || state_eval_encoder_config()
4273 !hdw->state_pipeline_req || state_eval_encoder_config()
4274 !hdw->state_pipeline_config) { state_eval_encoder_config()
4278 if (timer_pending(&hdw->encoder_wait_timer)) { state_eval_encoder_config()
4279 del_timer_sync(&hdw->encoder_wait_timer); state_eval_encoder_config()
4281 if (hdw->state_encoder_waitok) { state_eval_encoder_config()
4285 hdw->state_encoder_waitok = 0; state_eval_encoder_config()
4287 hdw->state_encoder_waitok); state_eval_encoder_config()
4292 if (!hdw->state_encoder_waitok) { state_eval_encoder_config()
4293 if (!timer_pending(&hdw->encoder_wait_timer)) { state_eval_encoder_config()
4300 if (!hdw->state_encoder_waitok) { state_eval_encoder_config()
4301 hdw->encoder_wait_timer.expires = state_eval_encoder_config()
4304 add_timer(&hdw->encoder_wait_timer); state_eval_encoder_config()
4312 pvr2_encoder_configure(hdw); state_eval_encoder_config()
4313 if (hdw->state_encoder_ok) hdw->state_encoder_config = !0; state_eval_encoder_config()
4315 trace_stbit("state_encoder_config",hdw->state_encoder_config); state_eval_encoder_config()
4321 static int state_check_disable_encoder_run(struct pvr2_hdw *hdw) state_check_disable_encoder_run() argument
4323 if (!hdw->state_encoder_ok) { state_check_disable_encoder_run()
4327 if (!hdw->state_pathway_ok) { state_check_disable_encoder_run()
4333 switch (hdw->pathway_state) { state_check_disable_encoder_run()
4335 if (!hdw->state_decoder_run) { state_check_disable_encoder_run()
4343 if (hdw->state_encoder_runok) { state_check_disable_encoder_run()
4366 static int state_check_enable_encoder_run(struct pvr2_hdw *hdw) state_check_enable_encoder_run() argument
4368 if (!hdw->state_encoder_ok) { state_check_enable_encoder_run()
4372 if (!hdw->state_pathway_ok) { state_check_enable_encoder_run()
4378 switch (hdw->pathway_state) { state_check_enable_encoder_run()
4380 if (hdw->state_decoder_run && hdw->state_decoder_ready) { state_check_enable_encoder_run()
4387 if ((hdw->hdw_desc->digital_control_scheme == state_check_enable_encoder_run()
4389 !hdw->state_encoder_runok) { state_check_enable_encoder_run()
4412 static int state_eval_encoder_run(struct pvr2_hdw *hdw) state_eval_encoder_run() argument
4414 if (hdw->state_encoder_run) { state_eval_encoder_run()
4415 if (!state_check_disable_encoder_run(hdw)) return 0; state_eval_encoder_run()
4416 if (hdw->state_encoder_ok) { state_eval_encoder_run()
4417 del_timer_sync(&hdw->encoder_run_timer); state_eval_encoder_run()
4418 if (pvr2_encoder_stop(hdw) < 0) return !0; state_eval_encoder_run()
4420 hdw->state_encoder_run = 0; state_eval_encoder_run()
4422 if (!state_check_enable_encoder_run(hdw)) return 0; state_eval_encoder_run()
4423 if (pvr2_encoder_start(hdw) < 0) return !0; state_eval_encoder_run()
4424 hdw->state_encoder_run = !0; state_eval_encoder_run()
4425 if (!hdw->state_encoder_runok) { state_eval_encoder_run()
4426 hdw->encoder_run_timer.expires = jiffies + state_eval_encoder_run()
4428 add_timer(&hdw->encoder_run_timer); state_eval_encoder_run()
4431 trace_stbit("state_encoder_run",hdw->state_encoder_run); state_eval_encoder_run()
4439 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; pvr2_hdw_quiescent_timeout() local
4440 hdw->state_decoder_quiescent = !0; pvr2_hdw_quiescent_timeout()
4441 trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); pvr2_hdw_quiescent_timeout()
4442 hdw->state_stale = !0; pvr2_hdw_quiescent_timeout()
4443 queue_work(hdw->workqueue,&hdw->workpoll); pvr2_hdw_quiescent_timeout()
4450 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; pvr2_hdw_decoder_stabilization_timeout() local
4451 hdw->state_decoder_ready = !0; pvr2_hdw_decoder_stabilization_timeout()
4452 trace_stbit("state_decoder_ready", hdw->state_decoder_ready); pvr2_hdw_decoder_stabilization_timeout()
4453 hdw->state_stale = !0; pvr2_hdw_decoder_stabilization_timeout()
4454 queue_work(hdw->workqueue, &hdw->workpoll); pvr2_hdw_decoder_stabilization_timeout()
4461 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; pvr2_hdw_encoder_wait_timeout() local
4462 hdw->state_encoder_waitok = !0; pvr2_hdw_encoder_wait_timeout()
4463 trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok); pvr2_hdw_encoder_wait_timeout()
4464 hdw->state_stale = !0; pvr2_hdw_encoder_wait_timeout()
4465 queue_work(hdw->workqueue,&hdw->workpoll); pvr2_hdw_encoder_wait_timeout()
4472 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data; pvr2_hdw_encoder_run_timeout() local
4473 if (!hdw->state_encoder_runok) { pvr2_hdw_encoder_run_timeout()
4474 hdw->state_encoder_runok = !0; pvr2_hdw_encoder_run_timeout()
4475 trace_stbit("state_encoder_runok",hdw->state_encoder_runok); pvr2_hdw_encoder_run_timeout()
4476 hdw->state_stale = !0; pvr2_hdw_encoder_run_timeout()
4477 queue_work(hdw->workqueue,&hdw->workpoll); pvr2_hdw_encoder_run_timeout()
4483 static int state_eval_decoder_run(struct pvr2_hdw *hdw) state_eval_decoder_run() argument
4485 if (hdw->state_decoder_run) { state_eval_decoder_run()
4486 if (hdw->state_encoder_ok) { state_eval_decoder_run()
4487 if (hdw->state_pipeline_req && state_eval_decoder_run()
4488 !hdw->state_pipeline_pause && state_eval_decoder_run()
4489 hdw->state_pathway_ok) return 0; state_eval_decoder_run()
4491 if (!hdw->flag_decoder_missed) { state_eval_decoder_run()
4492 pvr2_decoder_enable(hdw,0); state_eval_decoder_run()
4494 hdw->state_decoder_quiescent = 0; state_eval_decoder_run()
4495 hdw->state_decoder_run = 0; state_eval_decoder_run()
4497 del_timer_sync(&hdw->quiescent_timer); state_eval_decoder_run()
4501 del_timer_sync(&hdw->decoder_stabilization_timer); state_eval_decoder_run()
4502 hdw->state_decoder_ready = 0; state_eval_decoder_run()
4504 if (!hdw->state_decoder_quiescent) { state_eval_decoder_run()
4505 if (!timer_pending(&hdw->quiescent_timer)) { state_eval_decoder_run()
4516 if (!hdw->state_decoder_quiescent) { state_eval_decoder_run()
4517 hdw->quiescent_timer.expires = state_eval_decoder_run()
4520 add_timer(&hdw->quiescent_timer); state_eval_decoder_run()
4528 if (!hdw->state_pathway_ok || state_eval_decoder_run()
4529 (hdw->pathway_state != PVR2_PATHWAY_ANALOG) || state_eval_decoder_run()
4530 !hdw->state_pipeline_req || state_eval_decoder_run()
4531 hdw->state_pipeline_pause || state_eval_decoder_run()
4532 !hdw->state_pipeline_config || state_eval_decoder_run()
4533 !hdw->state_encoder_config || state_eval_decoder_run()
4534 !hdw->state_encoder_ok) return 0; state_eval_decoder_run()
4535 del_timer_sync(&hdw->quiescent_timer); state_eval_decoder_run()
4536 if (hdw->flag_decoder_missed) return 0; state_eval_decoder_run()
4537 if (pvr2_decoder_enable(hdw,!0) < 0) return 0; state_eval_decoder_run()
4538 hdw->state_decoder_quiescent = 0; state_eval_decoder_run()
4539 hdw->state_decoder_ready = 0; state_eval_decoder_run()
4540 hdw->state_decoder_run = !0; state_eval_decoder_run()
4541 if (hdw->decoder_client_id == PVR2_CLIENT_ID_SAA7115) { state_eval_decoder_run()
4542 hdw->decoder_stabilization_timer.expires = state_eval_decoder_run()
4545 add_timer(&hdw->decoder_stabilization_timer); state_eval_decoder_run()
4547 hdw->state_decoder_ready = !0; state_eval_decoder_run()
4550 trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent); state_eval_decoder_run()
4551 trace_stbit("state_decoder_run",hdw->state_decoder_run); state_eval_decoder_run()
4552 trace_stbit("state_decoder_ready", hdw->state_decoder_ready); state_eval_decoder_run()
4558 static int state_eval_usbstream_run(struct pvr2_hdw *hdw) state_eval_usbstream_run() argument
4560 if (hdw->state_usbstream_run) { state_eval_usbstream_run()
4562 if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) { state_eval_usbstream_run()
4563 fl = (hdw->state_encoder_ok && state_eval_usbstream_run()
4564 hdw->state_encoder_run); state_eval_usbstream_run()
4565 } else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) && state_eval_usbstream_run()
4566 (hdw->hdw_desc->flag_digital_requires_cx23416)) { state_eval_usbstream_run()
4567 fl = hdw->state_encoder_ok; state_eval_usbstream_run()
4570 hdw->state_pipeline_req && state_eval_usbstream_run()
4571 !hdw->state_pipeline_pause && state_eval_usbstream_run()
4572 hdw->state_pathway_ok) { state_eval_usbstream_run()
4575 pvr2_hdw_cmd_usbstream(hdw,0); state_eval_usbstream_run()
4576 hdw->state_usbstream_run = 0; state_eval_usbstream_run()
4578 if (!hdw->state_pipeline_req || state_eval_usbstream_run()
4579 hdw->state_pipeline_pause || state_eval_usbstream_run()
4580 !hdw->state_pathway_ok) return 0; state_eval_usbstream_run()
4581 if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) { state_eval_usbstream_run()
4582 if (!hdw->state_encoder_ok || state_eval_usbstream_run()
4583 !hdw->state_encoder_run) return 0; state_eval_usbstream_run()
4584 } else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) && state_eval_usbstream_run()
4585 (hdw->hdw_desc->flag_digital_requires_cx23416)) { state_eval_usbstream_run()
4586 if (!hdw->state_encoder_ok) return 0; state_eval_usbstream_run()
4587 if (hdw->state_encoder_run) return 0; state_eval_usbstream_run()
4588 if (hdw->hdw_desc->digital_control_scheme == state_eval_usbstream_run()
4595 if (!hdw->state_encoder_runok) return 0; state_eval_usbstream_run()
4598 if (pvr2_hdw_cmd_usbstream(hdw,!0) < 0) return 0; state_eval_usbstream_run()
4599 hdw->state_usbstream_run = !0; state_eval_usbstream_run()
4601 trace_stbit("state_usbstream_run",hdw->state_usbstream_run); state_eval_usbstream_run()
4607 static int state_eval_pipeline_config(struct pvr2_hdw *hdw) state_eval_pipeline_config() argument
4609 if (hdw->state_pipeline_config || state_eval_pipeline_config()
4610 hdw->state_pipeline_pause) return 0; state_eval_pipeline_config()
4611 pvr2_hdw_commit_execute(hdw); state_eval_pipeline_config()
4619 static int state_update_pipeline_state(struct pvr2_hdw *hdw) state_update_pipeline_state() argument
4624 st = !(hdw->state_encoder_run || state_update_pipeline_state()
4625 hdw->state_decoder_run || state_update_pipeline_state()
4626 hdw->state_usbstream_run || state_update_pipeline_state()
4627 (!hdw->state_decoder_quiescent)); state_update_pipeline_state()
4628 if (!st != !hdw->state_pipeline_idle) { state_update_pipeline_state()
4629 hdw->state_pipeline_idle = st; state_update_pipeline_state()
4632 if (hdw->state_pipeline_idle && hdw->state_pipeline_pause) { state_update_pipeline_state()
4633 hdw->state_pipeline_pause = 0; state_update_pipeline_state()
4655 static int pvr2_hdw_state_update(struct pvr2_hdw *hdw) pvr2_hdw_state_update() argument
4661 if (!hdw->state_stale) return 0; pvr2_hdw_state_update()
4662 if ((hdw->fw1_state != FW1_STATE_OK) || pvr2_hdw_state_update()
4663 !hdw->flag_ok) { pvr2_hdw_state_update()
4664 hdw->state_stale = 0; pvr2_hdw_state_update()
4676 state_update_pipeline_state(hdw); pvr2_hdw_state_update()
4678 for (i = 0; (i<ARRAY_SIZE(eval_funcs)) && hdw->flag_ok; i++) { pvr2_hdw_state_update()
4679 if ((*eval_funcs[i])(hdw)) { pvr2_hdw_state_update()
4682 state_update_pipeline_state(hdw); pvr2_hdw_state_update()
4685 } while (check_flag && hdw->flag_ok); pvr2_hdw_state_update()
4686 hdw->state_stale = 0; pvr2_hdw_state_update()
4687 trace_stbit("state_stale",hdw->state_stale); pvr2_hdw_state_update()
4720 static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw *hdw,int which, pvr2_hdw_report_unlocked() argument
4728 (hdw->flag_ok ? " <ok>" : " <fail>"), pvr2_hdw_report_unlocked()
4729 (hdw->flag_init_ok ? " <init>" : " <uninitialized>"), pvr2_hdw_report_unlocked()
4730 (hdw->flag_disconnected ? " <disconnected>" : pvr2_hdw_report_unlocked()
4732 (hdw->flag_tripped ? " <tripped>" : ""), pvr2_hdw_report_unlocked()
4733 (hdw->flag_decoder_missed ? " <no decoder>" : ""), pvr2_hdw_report_unlocked()
4734 pvr2_pathway_state_name(hdw->pathway_state)); pvr2_hdw_report_unlocked()
4740 (hdw->state_pipeline_idle ? " <idle>" : ""), pvr2_hdw_report_unlocked()
4741 (hdw->state_pipeline_config ? pvr2_hdw_report_unlocked()
4743 (hdw->state_pipeline_req ? " <req>" : ""), pvr2_hdw_report_unlocked()
4744 (hdw->state_pipeline_pause ? " <pause>" : "")); pvr2_hdw_report_unlocked()
4749 (hdw->state_decoder_run ? pvr2_hdw_report_unlocked()
4750 (hdw->state_decoder_ready ? pvr2_hdw_report_unlocked()
4752 (hdw->state_decoder_quiescent ? pvr2_hdw_report_unlocked()
4754 (hdw->state_decoder_quiescent ? pvr2_hdw_report_unlocked()
4756 (hdw->state_encoder_ok ? pvr2_hdw_report_unlocked()
4758 (hdw->state_encoder_run ? pvr2_hdw_report_unlocked()
4759 (hdw->state_encoder_runok ? pvr2_hdw_report_unlocked()
4762 (hdw->state_encoder_runok ? pvr2_hdw_report_unlocked()
4765 (hdw->state_encoder_config ? pvr2_hdw_report_unlocked()
4767 (hdw->state_encoder_waitok ? pvr2_hdw_report_unlocked()
4769 (hdw->state_usbstream_run ? pvr2_hdw_report_unlocked()
4771 (hdw->state_pathway_ok ? pvr2_hdw_report_unlocked()
4777 pvr2_get_state_name(hdw->master_state)); pvr2_hdw_report_unlocked()
4786 tcnt += print_input_mask(hdw->input_avail_mask, pvr2_hdw_report_unlocked()
4789 if (hdw->input_avail_mask != hdw->input_allowed_mask) { pvr2_hdw_report_unlocked()
4794 tcnt += print_input_mask(hdw->input_allowed_mask, pvr2_hdw_report_unlocked()
4802 if (!hdw->vid_stream) break; pvr2_hdw_report_unlocked()
4803 pvr2_stream_get_stats(hdw->vid_stream, pvr2_hdw_report_unlocked()
4819 unsigned int id = hdw->ir_scheme_active; pvr2_hdw_report_unlocked()
4833 static unsigned int pvr2_hdw_report_clients(struct pvr2_hdw *hdw, pvr2_hdw_report_clients() argument
4845 v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) { pvr2_hdw_report_clients()
4873 unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw, pvr2_hdw_state_report() argument
4878 LOCK_TAKE(hdw->big_lock); pvr2_hdw_state_report()
4880 ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,acnt); pvr2_hdw_state_report()
4887 ccnt = pvr2_hdw_report_clients(hdw, buf, acnt); pvr2_hdw_state_report()
4889 LOCK_GIVE(hdw->big_lock); pvr2_hdw_state_report()
4894 static void pvr2_hdw_state_log_state(struct pvr2_hdw *hdw) pvr2_hdw_state_log_state() argument
4901 ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,sizeof(buf)); pvr2_hdw_state_log_state()
4903 printk(KERN_INFO "%s %.*s\n",hdw->name,ccnt,buf); pvr2_hdw_state_log_state()
4905 ccnt = pvr2_hdw_report_clients(hdw, buf, sizeof(buf)); pvr2_hdw_state_log_state()
4912 printk(KERN_INFO "%s %.*s\n", hdw->name, lcnt, buf + ucnt); pvr2_hdw_state_log_state()
4920 static int pvr2_hdw_state_eval(struct pvr2_hdw *hdw) pvr2_hdw_state_eval() argument
4930 pvr2_hdw_state_log_state(hdw); pvr2_hdw_state_eval()
4934 state_updated = pvr2_hdw_state_update(hdw); pvr2_hdw_state_eval()
4936 analog_mode = (hdw->pathway_state != PVR2_PATHWAY_DIGITAL); pvr2_hdw_state_eval()
4939 if (!hdw->flag_ok) { pvr2_hdw_state_eval()
4941 } else if (hdw->fw1_state != FW1_STATE_OK) { pvr2_hdw_state_eval()
4944 hdw->hdw_desc->flag_digital_requires_cx23416) && pvr2_hdw_state_eval()
4945 !hdw->state_encoder_ok) { pvr2_hdw_state_eval()
4947 } else if (hdw->flag_tripped || pvr2_hdw_state_eval()
4948 (analog_mode && hdw->flag_decoder_missed)) { pvr2_hdw_state_eval()
4950 } else if (hdw->state_usbstream_run && pvr2_hdw_state_eval()
4952 (hdw->state_encoder_run && hdw->state_decoder_run))) { pvr2_hdw_state_eval()
4957 if (hdw->master_state != st) { pvr2_hdw_state_eval()
4960 pvr2_get_state_name(hdw->master_state), pvr2_hdw_state_eval()
4962 pvr2_led_ctrl(hdw,st == PVR2_STATE_RUN); pvr2_hdw_state_eval()
4963 hdw->master_state = st; pvr2_hdw_state_eval()
4969 wake_up(&hdw->state_wait_data); pvr2_hdw_state_eval()
4973 pvr2_hdw_state_log_state(hdw); pvr2_hdw_state_eval()
4983 static void pvr2_hdw_state_sched(struct pvr2_hdw *hdw) pvr2_hdw_state_sched() argument
4985 if (hdw->state_stale) return; pvr2_hdw_state_sched()
4986 hdw->state_stale = !0; pvr2_hdw_state_sched()
4987 trace_stbit("state_stale",hdw->state_stale); pvr2_hdw_state_sched()
4988 queue_work(hdw->workqueue,&hdw->workpoll); pvr2_hdw_state_sched()
4992 int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp) pvr2_hdw_gpio_get_dir() argument
4994 return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp); pvr2_hdw_gpio_get_dir()
4998 int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp) pvr2_hdw_gpio_get_out() argument
5000 return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp); pvr2_hdw_gpio_get_out()
5004 int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp) pvr2_hdw_gpio_get_in() argument
5006 return pvr2_read_register(hdw,PVR2_GPIO_IN,dp); pvr2_hdw_gpio_get_in()
5010 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val) pvr2_hdw_gpio_chg_dir() argument
5015 ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval); pvr2_hdw_gpio_chg_dir()
5027 return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval); pvr2_hdw_gpio_chg_dir()
5031 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val) pvr2_hdw_gpio_chg_out() argument
5036 ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval); pvr2_hdw_gpio_chg_out()
5047 return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval); pvr2_hdw_gpio_chg_out()
5051 void pvr2_hdw_status_poll(struct pvr2_hdw *hdw) pvr2_hdw_status_poll() argument
5053 struct v4l2_tuner *vtp = &hdw->tuner_signal_info; pvr2_hdw_status_poll()
5055 vtp->type = (hdw->input_val == PVR2_CVAL_INPUT_RADIO) ? pvr2_hdw_status_poll()
5057 hdw->tuner_signal_stale = 0; pvr2_hdw_status_poll()
5062 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, g_tuner, vtp); pvr2_hdw_status_poll()
5072 hdw->cropcap_stale = 0; pvr2_hdw_status_poll()
5076 unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw *hdw) pvr2_hdw_get_input_available() argument
5078 return hdw->input_avail_mask; pvr2_hdw_get_input_available()
5082 unsigned int pvr2_hdw_get_input_allowed(struct pvr2_hdw *hdw) pvr2_hdw_get_input_allowed() argument
5084 return hdw->input_allowed_mask; pvr2_hdw_get_input_allowed()
5088 static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v) pvr2_hdw_set_input() argument
5090 if (hdw->input_val != v) { pvr2_hdw_set_input()
5091 hdw->input_val = v; pvr2_hdw_set_input()
5092 hdw->input_dirty = !0; pvr2_hdw_set_input()
5098 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) { pvr2_hdw_set_input()
5099 hdw->freqSelector = 0; pvr2_hdw_set_input()
5100 hdw->freqDirty = !0; pvr2_hdw_set_input()
5101 } else if ((hdw->input_val == PVR2_CVAL_INPUT_TV) || pvr2_hdw_set_input()
5102 (hdw->input_val == PVR2_CVAL_INPUT_DTV)) { pvr2_hdw_set_input()
5103 hdw->freqSelector = 1; pvr2_hdw_set_input()
5104 hdw->freqDirty = !0; pvr2_hdw_set_input()
5110 int pvr2_hdw_set_input_allowed(struct pvr2_hdw *hdw, pvr2_hdw_set_input_allowed() argument
5116 LOCK_TAKE(hdw->big_lock); pvr2_hdw_set_input_allowed()
5118 nv = hdw->input_allowed_mask & ~change_mask; pvr2_hdw_set_input_allowed()
5120 nv &= hdw->input_avail_mask; pvr2_hdw_set_input_allowed()
5126 hdw->input_allowed_mask = nv; pvr2_hdw_set_input_allowed()
5127 if ((1 << hdw->input_val) & hdw->input_allowed_mask) { pvr2_hdw_set_input_allowed()
5134 if (!hdw->input_allowed_mask) { pvr2_hdw_set_input_allowed()
5138 m = hdw->input_allowed_mask; pvr2_hdw_set_input_allowed()
5141 pvr2_hdw_set_input(hdw,idx); pvr2_hdw_set_input_allowed()
5145 LOCK_GIVE(hdw->big_lock); pvr2_hdw_set_input_allowed()
5151 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw) pvr2_hdw_get_eeprom_addr() argument
5154 LOCK_TAKE(hdw->ctl_lock); do { pvr2_hdw_get_eeprom_addr()
5155 hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR; pvr2_hdw_get_eeprom_addr()
5156 result = pvr2_send_request(hdw, pvr2_hdw_get_eeprom_addr()
5157 hdw->cmd_buffer,1, pvr2_hdw_get_eeprom_addr()
5158 hdw->cmd_buffer,1); pvr2_hdw_get_eeprom_addr()
5160 result = hdw->cmd_buffer[0]; pvr2_hdw_get_eeprom_addr()
5161 } while(0); LOCK_GIVE(hdw->ctl_lock); pvr2_hdw_get_eeprom_addr()
|
| H A D | pvrusb2-encoder.c | 26 #include "pvrusb2-hdw-internal.h"
40 static int pvr2_encoder_write_words(struct pvr2_hdw *hdw, pvr2_encoder_write_words() argument
62 memset(hdw->cmd_buffer,0,sizeof(hdw->cmd_buffer)); pvr2_encoder_write_words()
64 hdw->cmd_buffer[bAddr++] = FX2CMD_MEM_WRITE_DWORD; pvr2_encoder_write_words()
67 hdw->cmd_buffer[bAddr+6] = (addr & 0xffu); pvr2_encoder_write_words()
68 hdw->cmd_buffer[bAddr+5] = ((addr>>8) & 0xffu); pvr2_encoder_write_words()
69 hdw->cmd_buffer[bAddr+4] = ((addr>>16) & 0xffu); pvr2_encoder_write_words()
70 PVR2_DECOMPOSE_LE(hdw->cmd_buffer, bAddr,data[idx]); pvr2_encoder_write_words()
73 ret = pvr2_send_request(hdw, pvr2_encoder_write_words()
74 hdw->cmd_buffer,1+(chunkCnt*7), pvr2_encoder_write_words()
86 static int pvr2_encoder_read_words(struct pvr2_hdw *hdw, pvr2_encoder_read_words() argument
108 hdw->cmd_buffer[0] = pvr2_encoder_read_words()
111 hdw->cmd_buffer[1] = 0; pvr2_encoder_read_words()
112 hdw->cmd_buffer[2] = 0; pvr2_encoder_read_words()
113 hdw->cmd_buffer[3] = 0; pvr2_encoder_read_words()
114 hdw->cmd_buffer[4] = 0; pvr2_encoder_read_words()
115 hdw->cmd_buffer[5] = ((offs>>16) & 0xffu); pvr2_encoder_read_words()
116 hdw->cmd_buffer[6] = ((offs>>8) & 0xffu); pvr2_encoder_read_words()
117 hdw->cmd_buffer[7] = (offs & 0xffu); pvr2_encoder_read_words()
118 ret = pvr2_send_request(hdw, pvr2_encoder_read_words()
119 hdw->cmd_buffer,8, pvr2_encoder_read_words()
120 hdw->cmd_buffer, pvr2_encoder_read_words()
125 data[idx] = PVR2_COMPOSE_LE(hdw->cmd_buffer,idx*4); pvr2_encoder_read_words()
155 struct pvr2_hdw *hdw = (struct pvr2_hdw *)ctxt; pvr2_encoder_cmd() local
209 LOCK_TAKE(hdw->ctl_lock); do { pvr2_encoder_cmd()
211 if (!hdw->state_encoder_ok) { pvr2_encoder_cmd()
230 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,idx); pvr2_encoder_cmd()
233 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1); pvr2_encoder_cmd()
238 ret = pvr2_encoder_read_words(hdw,MBOX_BASE,rdData, pvr2_encoder_cmd()
280 del_timer_sync(&hdw->encoder_run_timer); pvr2_encoder_cmd()
281 hdw->state_encoder_ok = 0; pvr2_encoder_cmd()
285 (hdw->state_encoder_ok ? "true" : "false")); pvr2_encoder_cmd()
286 if (hdw->state_encoder_runok) { pvr2_encoder_cmd()
287 hdw->state_encoder_runok = 0; pvr2_encoder_cmd()
291 (hdw->state_encoder_runok ? pvr2_encoder_cmd()
309 ret = pvr2_encoder_write_words(hdw,MBOX_BASE,wrData,1); pvr2_encoder_cmd()
312 } while(0); LOCK_GIVE(hdw->ctl_lock); pvr2_encoder_cmd()
318 static int pvr2_encoder_vcmd(struct pvr2_hdw *hdw, int cmd, pvr2_encoder_vcmd() argument
341 return pvr2_encoder_cmd(hdw,cmd,args,0,data); pvr2_encoder_vcmd()
347 static int pvr2_encoder_prep_config(struct pvr2_hdw *hdw) pvr2_encoder_prep_config() argument
358 LOCK_TAKE(hdw->ctl_lock); do { pvr2_encoder_prep_config()
361 pvr2_encoder_write_words(hdw,0x01fe,dat,1); pvr2_encoder_prep_config()
362 pvr2_encoder_write_words(hdw,0x023e,dat,1); pvr2_encoder_prep_config()
363 } while(0); LOCK_GIVE(hdw->ctl_lock); pvr2_encoder_prep_config()
378 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 5,0,0,0); pvr2_encoder_prep_config()
386 if (hdw->hdw_desc->flag_has_cx25840) { pvr2_encoder_prep_config()
391 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 3, pvr2_encoder_prep_config()
394 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 8,0,0,0); pvr2_encoder_prep_config()
402 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 4,1,0,0); pvr2_encoder_prep_config()
405 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4, 0,3,0,0); pvr2_encoder_prep_config()
406 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC,4,15,0,0,0); pvr2_encoder_prep_config()
410 ret |= pvr2_encoder_vcmd(hdw, CX2341X_ENC_MISC, 2, 4, 1); pvr2_encoder_prep_config()
415 int pvr2_encoder_adjust(struct pvr2_hdw *hdw) pvr2_encoder_adjust() argument
418 ret = cx2341x_update(hdw,pvr2_encoder_cmd, pvr2_encoder_adjust()
419 (hdw->enc_cur_valid ? &hdw->enc_cur_state : NULL), pvr2_encoder_adjust()
420 &hdw->enc_ctl_state); pvr2_encoder_adjust()
425 hdw->enc_cur_state = hdw->enc_ctl_state; pvr2_encoder_adjust()
426 hdw->enc_cur_valid = !0; pvr2_encoder_adjust()
432 int pvr2_encoder_configure(struct pvr2_hdw *hdw) pvr2_encoder_configure() argument
438 hdw->enc_ctl_state.port = CX2341X_PORT_STREAMING; pvr2_encoder_configure()
439 hdw->enc_ctl_state.width = hdw->res_hor_val; pvr2_encoder_configure()
440 hdw->enc_ctl_state.height = hdw->res_ver_val; pvr2_encoder_configure()
441 hdw->enc_ctl_state.is_50hz = ((hdw->std_mask_cur & V4L2_STD_525_60) ? pvr2_encoder_configure()
446 ret |= pvr2_encoder_prep_config(hdw); pvr2_encoder_configure()
450 if (hdw->hdw_desc->flag_has_cx25840) { pvr2_encoder_configure()
456 hdw,CX2341X_ENC_SET_NUM_VSYNC_LINES, 2, pvr2_encoder_configure()
461 hdw,CX2341X_ENC_SET_EVENT_NOTIFICATION, 4, pvr2_encoder_configure()
465 hdw,CX2341X_ENC_SET_VBI_LINE, 5, pvr2_encoder_configure()
474 ret = pvr2_encoder_adjust(hdw); pvr2_encoder_configure()
478 hdw, CX2341X_ENC_INITIALIZE_INPUT, 0); pvr2_encoder_configure()
490 int pvr2_encoder_start(struct pvr2_hdw *hdw) pvr2_encoder_start() argument
495 pvr2_write_register(hdw, 0x0048, 0xbfffffff); pvr2_encoder_start()
497 pvr2_encoder_vcmd(hdw,CX2341X_ENC_MUTE_VIDEO,1, pvr2_encoder_start()
498 hdw->input_val == PVR2_CVAL_INPUT_RADIO ? 1 : 0); pvr2_encoder_start()
500 switch (hdw->active_stream_type) { pvr2_encoder_start()
502 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2, pvr2_encoder_start()
506 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2, pvr2_encoder_start()
510 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_START_CAPTURE,2, pvr2_encoder_start()
517 int pvr2_encoder_stop(struct pvr2_hdw *hdw) pvr2_encoder_stop() argument
522 pvr2_write_register(hdw, 0x0048, 0xffffffff); pvr2_encoder_stop()
524 switch (hdw->active_stream_type) { pvr2_encoder_stop()
526 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3, pvr2_encoder_stop()
530 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3, pvr2_encoder_stop()
534 status = pvr2_encoder_vcmd(hdw,CX2341X_ENC_STOP_CAPTURE,3, pvr2_encoder_stop()
|
| H A D | pvrusb2-i2c-core.c | 25 #include "pvrusb2-hdw-internal.h"
53 static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */ pvr2_i2c_write() argument
63 if (length > (sizeof(hdw->cmd_buffer) - 3)) { pvr2_i2c_write()
68 length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3)); pvr2_i2c_write()
72 LOCK_TAKE(hdw->ctl_lock); pvr2_i2c_write()
75 memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); pvr2_i2c_write()
78 hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */ pvr2_i2c_write()
79 hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */ pvr2_i2c_write()
80 hdw->cmd_buffer[2] = length; /* length of what follows */ pvr2_i2c_write()
81 if (length) memcpy(hdw->cmd_buffer + 3, data, length); pvr2_i2c_write()
84 ret = pvr2_send_request(hdw, pvr2_i2c_write()
85 hdw->cmd_buffer, pvr2_i2c_write()
87 hdw->cmd_buffer, pvr2_i2c_write()
90 if (hdw->cmd_buffer[0] != 8) { pvr2_i2c_write()
92 if (hdw->cmd_buffer[0] != 7) { pvr2_i2c_write()
95 i2c_addr,hdw->cmd_buffer[0]); pvr2_i2c_write()
100 LOCK_GIVE(hdw->ctl_lock); pvr2_i2c_write()
105 static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */ pvr2_i2c_read() argument
117 if (dlen > (sizeof(hdw->cmd_buffer) - 4)) { pvr2_i2c_read()
122 dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4)); pvr2_i2c_read()
125 if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) { pvr2_i2c_read()
130 rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1)); pvr2_i2c_read()
134 LOCK_TAKE(hdw->ctl_lock); pvr2_i2c_read()
137 memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer)); pvr2_i2c_read()
140 hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */ pvr2_i2c_read()
141 hdw->cmd_buffer[1] = dlen; /* arg length */ pvr2_i2c_read()
142 hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one pvr2_i2c_read()
144 hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */ pvr2_i2c_read()
145 if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen); pvr2_i2c_read()
148 ret = pvr2_send_request(hdw, pvr2_i2c_read()
149 hdw->cmd_buffer, pvr2_i2c_read()
151 hdw->cmd_buffer, pvr2_i2c_read()
154 if (hdw->cmd_buffer[0] != 8) { pvr2_i2c_read()
156 if (hdw->cmd_buffer[0] != 7) { pvr2_i2c_read()
159 i2c_addr,hdw->cmd_buffer[0]); pvr2_i2c_read()
170 memcpy(res, hdw->cmd_buffer + 1, rlen); pvr2_i2c_read()
174 LOCK_GIVE(hdw->ctl_lock); pvr2_i2c_read()
181 static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw, pvr2_i2c_basic_op() argument
191 return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen); pvr2_i2c_basic_op()
193 return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen); pvr2_i2c_basic_op()
204 static int i2c_24xxx_ir(struct pvr2_hdw *hdw, i2c_24xxx_ir() argument
232 LOCK_TAKE(hdw->ctl_lock); do { i2c_24xxx_ir()
233 hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE; i2c_24xxx_ir()
234 stat = pvr2_send_request(hdw, i2c_24xxx_ir()
235 hdw->cmd_buffer,1, i2c_24xxx_ir()
236 hdw->cmd_buffer,4); i2c_24xxx_ir()
237 dat[0] = hdw->cmd_buffer[0]; i2c_24xxx_ir()
238 dat[1] = hdw->cmd_buffer[1]; i2c_24xxx_ir()
239 dat[2] = hdw->cmd_buffer[2]; i2c_24xxx_ir()
240 dat[3] = hdw->cmd_buffer[3]; i2c_24xxx_ir()
241 } while (0); LOCK_GIVE(hdw->ctl_lock); i2c_24xxx_ir()
274 static int i2c_hack_wm8775(struct pvr2_hdw *hdw, i2c_hack_wm8775() argument
281 return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); i2c_hack_wm8775()
287 static int i2c_black_hole(struct pvr2_hdw *hdw, i2c_black_hole() argument
300 static int i2c_hack_cx25840(struct pvr2_hdw *hdw, i2c_hack_cx25840() argument
306 int state = hdw->i2c_cx25840_hack_state; i2c_hack_cx25840()
316 return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen); i2c_hack_cx25840()
351 ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen); i2c_hack_cx25840()
363 hdw->i2c_func[0x44] = NULL; i2c_hack_cx25840()
364 pvr2_hdw_render_useless(hdw); i2c_hack_cx25840()
373 hdw->i2c_cx25840_hack_state = state; i2c_hack_cx25840()
377 hdw->i2c_cx25840_hack_state = state; i2c_hack_cx25840()
389 struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data); pvr2_i2c_xfer() local
396 funcp = hdw->i2c_func[msgs[0].addr]; pvr2_i2c_xfer()
409 if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) { pvr2_i2c_xfer()
423 if (bcnt > sizeof(hdw->cmd_buffer)-1) { pvr2_i2c_xfer()
424 bcnt = sizeof(hdw->cmd_buffer)-1; pvr2_i2c_xfer()
426 if (funcp(hdw,msgs[0].addr,NULL,0, pvr2_i2c_xfer()
439 if (funcp(hdw,msgs[0].addr, pvr2_i2c_xfer()
464 if (bcnt > sizeof(hdw->cmd_buffer)-1) { pvr2_i2c_xfer()
465 bcnt = sizeof(hdw->cmd_buffer)-1; pvr2_i2c_xfer()
467 if (funcp(hdw,msgs[0].addr, pvr2_i2c_xfer()
543 static int do_i2c_probe(struct pvr2_hdw *hdw, int addr) do_i2c_probe() argument
552 rc = i2c_transfer(&hdw->i2c_adap, msg, ARRAY_SIZE(msg)); do_i2c_probe()
556 static void do_i2c_scan(struct pvr2_hdw *hdw) do_i2c_scan() argument
559 printk(KERN_INFO "%s: i2c scan beginning\n", hdw->name); do_i2c_scan()
561 if (do_i2c_probe(hdw, i)) { do_i2c_scan()
563 hdw->name, i); do_i2c_scan()
566 printk(KERN_INFO "%s: i2c scan done.\n", hdw->name); do_i2c_scan()
569 static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw) pvr2_i2c_register_ir() argument
572 struct IR_i2c_init_data *init_data = &hdw->ir_init_data; pvr2_i2c_register_ir()
579 switch (hdw->ir_scheme_active) { pvr2_i2c_register_ir()
585 init_data->name = hdw->hdw_desc->description; pvr2_i2c_register_ir()
593 i2c_new_device(&hdw->i2c_adap, &info); pvr2_i2c_register_ir()
600 init_data->name = hdw->hdw_desc->description; pvr2_i2c_register_ir()
607 i2c_new_device(&hdw->i2c_adap, &info); pvr2_i2c_register_ir()
614 i2c_new_device(&hdw->i2c_adap, &info); pvr2_i2c_register_ir()
623 void pvr2_i2c_core_init(struct pvr2_hdw *hdw) pvr2_i2c_core_init() argument
630 hdw->i2c_func[idx] = pvr2_i2c_basic_op; pvr2_i2c_core_init()
634 if (ir_mode[hdw->unit_number] == 0) { pvr2_i2c_core_init()
635 printk(KERN_INFO "%s: IR disabled\n",hdw->name); pvr2_i2c_core_init()
636 hdw->i2c_func[0x18] = i2c_black_hole; pvr2_i2c_core_init()
637 } else if (ir_mode[hdw->unit_number] == 1) { pvr2_i2c_core_init()
638 if (hdw->ir_scheme_active == PVR2_IR_SCHEME_24XXX) { pvr2_i2c_core_init()
641 hdw->i2c_func[0x18] = i2c_24xxx_ir; pvr2_i2c_core_init()
644 if (hdw->hdw_desc->flag_has_cx25840) { pvr2_i2c_core_init()
645 hdw->i2c_func[0x44] = i2c_hack_cx25840; pvr2_i2c_core_init()
647 if (hdw->hdw_desc->flag_has_wm8775) { pvr2_i2c_core_init()
648 hdw->i2c_func[0x1b] = i2c_hack_wm8775; pvr2_i2c_core_init()
652 hdw->i2c_adap = pvr2_i2c_adap_template; pvr2_i2c_core_init()
653 hdw->i2c_algo = pvr2_i2c_algo_template; pvr2_i2c_core_init()
654 strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name)); pvr2_i2c_core_init()
655 hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev; pvr2_i2c_core_init()
656 hdw->i2c_adap.algo = &hdw->i2c_algo; pvr2_i2c_core_init()
657 hdw->i2c_adap.algo_data = hdw; pvr2_i2c_core_init()
658 hdw->i2c_linked = !0; pvr2_i2c_core_init()
659 i2c_set_adapdata(&hdw->i2c_adap, &hdw->v4l2_dev); pvr2_i2c_core_init()
660 i2c_add_adapter(&hdw->i2c_adap); pvr2_i2c_core_init()
661 if (hdw->i2c_func[0x18] == i2c_24xxx_ir) { pvr2_i2c_core_init()
668 if (do_i2c_probe(hdw, 0x71)) { pvr2_i2c_core_init()
672 hdw->i2c_func[0x18] = NULL; pvr2_i2c_core_init()
674 hdw->ir_scheme_active = PVR2_IR_SCHEME_24XXX_MCE; pvr2_i2c_core_init()
677 if (i2c_scan) do_i2c_scan(hdw); pvr2_i2c_core_init()
679 pvr2_i2c_register_ir(hdw); pvr2_i2c_core_init()
682 void pvr2_i2c_core_done(struct pvr2_hdw *hdw) pvr2_i2c_core_done() argument
684 if (hdw->i2c_linked) { pvr2_i2c_core_done()
685 i2c_del_adapter(&hdw->i2c_adap); pvr2_i2c_core_done()
686 hdw->i2c_linked = 0; pvr2_i2c_core_done()
|
| H A D | pvrusb2-v4l2.c | 25 #include "pvrusb2-hdw.h"
144 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_querycap() local
147 strlcpy(cap->bus_info, pvr2_hdw_get_bus_info(hdw), pvr2_querycap()
149 strlcpy(cap->card, pvr2_hdw_get_desc(hdw), sizeof(cap->card)); pvr2_querycap()
168 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_std() local
173 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_STDCUR), &val); pvr2_g_std()
181 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_std() local
184 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_STDCUR), std); pvr2_s_std()
190 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_querystd() local
195 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_STDDETECT), &val); pvr2_querystd()
203 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_enum_input() local
209 cptr = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT); pvr2_enum_input()
251 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_input() local
257 cptr = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT); pvr2_g_input()
273 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_input() local
278 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT), pvr2_s_input()
325 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_tuner() local
330 pvr2_hdw_execute_tuner_poll(hdw); pvr2_g_tuner()
331 return pvr2_hdw_get_tuner_status(hdw, vt); pvr2_g_tuner()
337 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_tuner() local
343 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_AUDIOMODE), pvr2_s_tuner()
350 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_frequency() local
357 ret = pvr2_hdw_get_tuner_status(hdw, &vt); pvr2_s_frequency()
360 ctrlp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT); pvr2_s_frequency()
377 pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_FREQUENCY),fv); pvr2_s_frequency()
383 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_frequency() local
389 ret = pvr2_hdw_get_tuner_status(hdw, &vt); pvr2_g_frequency()
393 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_FREQUENCY), pvr2_g_frequency()
398 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_INPUT), pvr2_g_frequency()
425 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_fmt_vid_cap() local
431 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_HRES), pvr2_g_fmt_vid_cap()
436 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_VRES), pvr2_g_fmt_vid_cap()
445 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_try_fmt_vid_cap() local
451 hcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_HRES); pvr2_try_fmt_vid_cap()
452 vcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_VRES); pvr2_try_fmt_vid_cap()
483 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_fmt_vid_cap() local
489 hcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_HRES); pvr2_s_fmt_vid_cap()
490 vcp = pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_VRES); pvr2_s_fmt_vid_cap()
499 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_streamon() local
509 ret = pvr2_hdw_set_stream_type(hdw, pdi->config); pvr2_streamon()
512 return pvr2_hdw_set_streaming(hdw, !0); pvr2_streamon()
518 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_streamoff() local
526 return pvr2_hdw_set_streaming(hdw, 0); pvr2_streamoff()
533 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_queryctrl() local
539 hdw, (vc->id & ~V4L2_CTRL_FLAG_NEXT_CTRL)); pvr2_queryctrl()
543 cptr = pvr2_hdw_get_ctrl_v4l(hdw, vc->id); pvr2_queryctrl()
591 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_querymenu() local
595 ret = pvr2_ctrl_get_valname(pvr2_hdw_get_ctrl_v4l(hdw, vm->id), pvr2_querymenu()
606 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_ctrl() local
610 ret = pvr2_ctrl_get_value(pvr2_hdw_get_ctrl_v4l(hdw, vc->id), pvr2_g_ctrl()
619 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_ctrl() local
621 return pvr2_ctrl_set_value(pvr2_hdw_get_ctrl_v4l(hdw, vc->id), pvr2_s_ctrl()
629 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_ext_ctrls() local
639 pvr2_hdw_get_ctrl_v4l(hdw, ctrl->id), &val); pvr2_g_ext_ctrls()
656 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_ext_ctrls() local
665 pvr2_hdw_get_ctrl_v4l(hdw, ctrl->id), pvr2_s_ext_ctrls()
679 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_try_ext_ctrls() local
688 pctl = pvr2_hdw_get_ctrl_v4l(hdw, ctrl->id); pvr2_try_ext_ctrls()
700 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_cropcap() local
705 ret = pvr2_hdw_get_cropcap(hdw, cap); pvr2_cropcap()
713 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_g_crop() local
720 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPL), &val); pvr2_g_crop()
725 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPT), &val); pvr2_g_crop()
730 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPW), &val); pvr2_g_crop()
735 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPH), &val); pvr2_g_crop()
745 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_s_crop() local
751 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPL), pvr2_s_crop()
756 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPT), pvr2_s_crop()
761 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPW), pvr2_s_crop()
766 pvr2_hdw_get_ctrl_by_id(hdw, PVR2_CID_CROPH), pvr2_s_crop()
776 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_log_status() local
778 pvr2_hdw_trigger_module_log(hdw); pvr2_log_status()
818 struct pvr2_hdw *hdw = dip->v4lp->channel.mc_head->hdw; pvr2_v4l2_dev_destroy() local
832 pvr2_hdw_v4l_store_minor_number(hdw,dip->minor_type,-1); pvr2_v4l2_dev_destroy()
900 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_v4l2_ioctl() local
904 v4l_printk_ioctl(pvr2_hdw_get_driver_name(hdw), cmd); pvr2_v4l2_ioctl()
906 if (!pvr2_hdw_dev_ok(hdw)) { pvr2_v4l2_ioctl()
914 pvr2_hdw_commit_ctl(hdw); pvr2_v4l2_ioctl()
921 v4l_printk_ioctl(pvr2_hdw_get_driver_name(hdw), cmd); pvr2_v4l2_ioctl()
937 struct pvr2_hdw *hdw = fhp->channel.mc_head->hdw; pvr2_v4l2_release() local
943 pvr2_hdw_set_streaming(hdw,0); pvr2_v4l2_release()
976 struct pvr2_hdw *hdw; pvr2_v4l2_open() local
984 hdw = vp->channel.hdw; pvr2_v4l2_open()
988 if (!pvr2_hdw_dev_ok(hdw)) { pvr2_v4l2_open()
1029 input_mask &= pvr2_hdw_get_input_available(hdw); pvr2_v4l2_open()
1053 fhp->fw_mode_flag = pvr2_hdw_cpufw_get_enabled(hdw); pvr2_v4l2_open()
1069 struct pvr2_hdw *hdw; pvr2_v4l2_iosetup() local
1092 hdw = fh->channel.mc_head->hdw; pvr2_v4l2_iosetup()
1095 pvr2_hdw_set_stream_type(hdw,fh->pdi->config); pvr2_v4l2_iosetup()
1096 if ((ret = pvr2_hdw_set_streaming(hdw,!0)) < 0) return ret; pvr2_v4l2_iosetup()
1108 struct pvr2_hdw *hdw = fh->channel.mc_head->hdw; pvr2_v4l2_read() local
1120 c2 = pvr2_hdw_cpufw_get(hdw,offs,tbuf,c1); pvr2_v4l2_read()
1210 struct pvr2_hdw *hdw; pvr2_v4l2_dev_init() local
1214 hdw = vp->channel.mc_head->hdw; pvr2_v4l2_dev_init()
1253 pvr2_hdw_get_ctrl_by_id(hdw, pvr2_v4l2_dev_init()
1259 unit_number = pvr2_hdw_get_unit_number(hdw); pvr2_v4l2_dev_init()
1263 pvr2_hdw_set_v4l2_dev(hdw, &dip->devbase); pvr2_v4l2_dev_init()
1276 pvr2_hdw_v4l_store_minor_number(hdw, pvr2_v4l2_dev_init()
1296 if (pvr2_hdw_get_input_available(vp->channel.mc_head->hdw) & pvr2_v4l2_create()
|
| H A D | pvrusb2-cs53l32a.c | 32 #include "pvrusb2-hdw-internal.h"
61 void pvr2_cs53l32a_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd) pvr2_cs53l32a_subdev_update() argument
63 if (hdw->input_dirty || hdw->force_dirty) { pvr2_cs53l32a_subdev_update()
65 unsigned int sid = hdw->hdw_desc->signal_routing_scheme; pvr2_cs53l32a_subdev_update()
68 hdw->input_val); pvr2_cs53l32a_subdev_update()
72 (hdw->input_val < 0) || pvr2_cs53l32a_subdev_update()
73 (hdw->input_val >= sp->cnt)) { pvr2_cs53l32a_subdev_update()
78 sid, hdw->input_val); pvr2_cs53l32a_subdev_update()
81 input = sp->def[hdw->input_val]; pvr2_cs53l32a_subdev_update()
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| H A D | pvrusb2-video-v4l.c | 34 #include "pvrusb2-hdw-internal.h"
78 void pvr2_saa7115_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd) pvr2_saa7115_subdev_update() argument
80 if (hdw->input_dirty || hdw->force_dirty) { pvr2_saa7115_subdev_update()
82 unsigned int sid = hdw->hdw_desc->signal_routing_scheme; pvr2_saa7115_subdev_update()
86 hdw->input_val); pvr2_saa7115_subdev_update()
91 (hdw->input_val < 0) || pvr2_saa7115_subdev_update()
92 (hdw->input_val >= sp->cnt)) { pvr2_saa7115_subdev_update()
97 sid, hdw->input_val); pvr2_saa7115_subdev_update()
100 input = sp->def[hdw->input_val]; pvr2_saa7115_subdev_update()
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| H A D | pvrusb2-debugifc.c | 23 #include "pvrusb2-hdw.h"
130 int pvr2_debugifc_print_info(struct pvr2_hdw *hdw,char *buf,unsigned int acnt) pvr2_debugifc_print_info() argument
135 pvr2_hdw_get_desc(hdw)); pvr2_debugifc_print_info()
139 ccnt = pvr2_hdw_state_report(hdw,buf,acnt); pvr2_debugifc_print_info()
146 int pvr2_debugifc_print_status(struct pvr2_hdw *hdw, pvr2_debugifc_print_status() argument
156 ret = pvr2_hdw_is_hsm(hdw); pvr2_debugifc_print_status()
162 pvr2_hdw_gpio_get_dir(hdw,&gpio_dir); pvr2_debugifc_print_status()
163 pvr2_hdw_gpio_get_out(hdw,&gpio_out); pvr2_debugifc_print_status()
164 pvr2_hdw_gpio_get_in(hdw,&gpio_in); pvr2_debugifc_print_status()
170 pvr2_hdw_get_streaming(hdw) ? "on" : "off"); pvr2_debugifc_print_status()
174 sp = pvr2_hdw_get_video_stream(hdw); pvr2_debugifc_print_status()
195 static int pvr2_debugifc_do1cmd(struct pvr2_hdw *hdw,const char *buf, pvr2_debugifc_do1cmd() argument
214 pvr2_hdw_cpureset_assert(hdw,!0); pvr2_debugifc_do1cmd()
215 pvr2_hdw_cpureset_assert(hdw,0); pvr2_debugifc_do1cmd()
218 pvr2_hdw_device_reset(hdw); pvr2_debugifc_do1cmd()
220 return pvr2_hdw_cmd_powerup(hdw); pvr2_debugifc_do1cmd()
222 return pvr2_hdw_cmd_deep_reset(hdw); pvr2_debugifc_do1cmd()
224 return pvr2_upload_firmware2(hdw); pvr2_debugifc_do1cmd()
226 return pvr2_hdw_cmd_decoder_reset(hdw); pvr2_debugifc_do1cmd()
228 return pvr2_hdw_untrip(hdw); pvr2_debugifc_do1cmd()
230 pvr2_stream_get_stats(pvr2_hdw_get_video_stream(hdw), pvr2_debugifc_do1cmd()
246 pvr2_hdw_cpufw_set_enabled(hdw, 2, !0); pvr2_debugifc_do1cmd()
249 pvr2_hdw_cpufw_set_enabled(hdw, 0, !0); pvr2_debugifc_do1cmd()
252 pvr2_hdw_cpufw_set_enabled(hdw, 1, !0); pvr2_debugifc_do1cmd()
257 pvr2_hdw_cpufw_set_enabled(hdw,0,!0); pvr2_debugifc_do1cmd()
260 pvr2_hdw_cpufw_set_enabled(hdw,0,0); pvr2_debugifc_do1cmd()
293 ret = pvr2_hdw_gpio_chg_dir(hdw,msk,val); pvr2_debugifc_do1cmd()
295 ret = pvr2_hdw_gpio_chg_out(hdw,msk,val); pvr2_debugifc_do1cmd()
305 int pvr2_debugifc_docmd(struct pvr2_hdw *hdw,const char *buf, pvr2_debugifc_docmd() argument
316 ret = pvr2_debugifc_do1cmd(hdw,buf,bcnt); pvr2_debugifc_docmd()
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| H A D | pvrusb2-audio.c | 23 #include "pvrusb2-hdw-internal.h"
60 void pvr2_msp3400_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd) pvr2_msp3400_subdev_update() argument
62 if (hdw->input_dirty || hdw->force_dirty) { pvr2_msp3400_subdev_update()
64 unsigned int sid = hdw->hdw_desc->signal_routing_scheme; pvr2_msp3400_subdev_update()
72 (hdw->input_val >= 0) && pvr2_msp3400_subdev_update()
73 (hdw->input_val < sp->cnt)) { pvr2_msp3400_subdev_update()
74 input = sp->def[hdw->input_val]; pvr2_msp3400_subdev_update()
80 sid, hdw->input_val); pvr2_msp3400_subdev_update()
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| H A D | pvrusb2-wm8775.c | 32 #include "pvrusb2-hdw-internal.h"
38 void pvr2_wm8775_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd) pvr2_wm8775_subdev_update() argument
40 if (hdw->input_dirty || hdw->force_dirty) { pvr2_wm8775_subdev_update()
43 switch (hdw->input_val) { pvr2_wm8775_subdev_update()
54 hdw->input_val, input); pvr2_wm8775_subdev_update()
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| H A D | pvrusb2-cx2584x-v4l.c | 33 #include "pvrusb2-hdw-internal.h"
125 void pvr2_cx25840_subdev_update(struct pvr2_hdw *hdw, struct v4l2_subdev *sd) pvr2_cx25840_subdev_update() argument
128 if (hdw->input_dirty || hdw->force_dirty) { pvr2_cx25840_subdev_update()
132 unsigned int sid = hdw->hdw_desc->signal_routing_scheme; pvr2_cx25840_subdev_update()
137 (hdw->input_val < 0) || pvr2_cx25840_subdev_update()
138 (hdw->input_val >= sp->cnt)) { pvr2_cx25840_subdev_update()
143 sid, hdw->input_val); pvr2_cx25840_subdev_update()
146 vid_input = sp->def[hdw->input_val].vid; pvr2_cx25840_subdev_update()
147 aud_input = sp->def[hdw->input_val].aud; pvr2_cx25840_subdev_update()
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| H A D | pvrusb2-eeprom.c | 24 #include "pvrusb2-hdw-internal.h"
45 static u8 *pvr2_eeprom_fetch(struct pvr2_hdw *hdw) pvr2_eeprom_fetch() argument
65 hdw->eeprom_addr); pvr2_eeprom_fetch()
66 addr = hdw->eeprom_addr; pvr2_eeprom_fetch()
105 if ((ret = i2c_transfer(&hdw->i2c_adap, pvr2_eeprom_fetch()
118 int pvr2_eeprom_analyze(struct pvr2_hdw *hdw) pvr2_eeprom_analyze() argument
125 eeprom = pvr2_eeprom_fetch(hdw); pvr2_eeprom_analyze()
131 fake_client.addr = hdw->eeprom_addr; pvr2_eeprom_analyze()
132 fake_client.adapter = &hdw->i2c_adap; pvr2_eeprom_analyze()
146 hdw->tuner_type = tvdata.tuner_type; pvr2_eeprom_analyze()
147 hdw->tuner_updated = !0; pvr2_eeprom_analyze()
148 hdw->serial_number = tvdata.serial_number; pvr2_eeprom_analyze()
149 hdw->std_mask_eeprom = tvdata.tuner_formats; pvr2_eeprom_analyze()
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| H A D | pvrusb2-context.c | 23 #include "pvrusb2-hdw.h"
83 pvr2_hdw_destroy(mp->hdw); pvr2_context_destroy()
122 if (pvr2_hdw_initialize(mp->hdw, pvr2_context_check()
126 pvr2_hdw_get_video_stream(mp->hdw); pvr2_context_check()
235 mp->hdw = pvr2_hdw_create(intf,devid); pvr2_context_create()
236 if (!mp->hdw) { pvr2_context_create()
251 struct pvr2_hdw *hdw = mp->hdw; pvr2_context_reset_input_limits() local
252 mmsk = pvr2_hdw_get_input_available(hdw); pvr2_context_reset_input_limits()
258 pvr2_hdw_set_input_allowed(hdw,mmsk,tmsk); pvr2_context_reset_input_limits()
259 pvr2_hdw_commit_ctl(hdw); pvr2_context_reset_input_limits()
282 pvr2_hdw_disconnect(mp->hdw); pvr2_context_disconnect()
291 cp->hdw = mp->hdw; pvr2_channel_init()
331 cp->hdw = NULL; pvr2_channel_done()
341 struct pvr2_hdw *hdw = cp->hdw; pvr2_channel_limit_inputs() local
343 mmsk = pvr2_hdw_get_input_available(hdw); pvr2_channel_limit_inputs()
368 if ((ret = pvr2_hdw_set_input_allowed(hdw,mmsk,tmsk)) != 0) { pvr2_channel_limit_inputs()
374 pvr2_hdw_commit_ctl(hdw); pvr2_channel_limit_inputs()
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| H A D | pvrusb2-ctrl.c | 22 #include "pvrusb2-hdw-internal.h"
64 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_set_mask_value()
79 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_set_mask_value()
89 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_value()
91 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_value()
109 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_max()
115 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_max()
125 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_min()
131 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_min()
141 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_def()
147 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_def()
157 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_cnt()
161 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_cnt()
171 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_mask()
175 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_mask()
204 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_get_valname()
233 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_get_valname()
510 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_sym_to_value()
541 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_sym_to_value()
593 LOCK_TAKE(cptr->hdw->big_lock); do { pvr2_ctrl_value_to_sym()
596 } while(0); LOCK_GIVE(cptr->hdw->big_lock); pvr2_ctrl_value_to_sym()
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| H A D | pvrusb2-devattr.c | 36 #include "pvrusb2-hdw-internal.h"
197 &adap->channel.hdw->i2c_adap); pvr2_lgdt3303_attach()
207 &adap->channel.hdw->i2c_adap, 0x61, pvr2_lgh06xf_attach()
257 &adap->channel.hdw->i2c_adap); pvr2_lgdt3302_attach()
267 &adap->channel.hdw->i2c_adap, 0x61, pvr2_fcv1236d_attach()
343 &adap->channel.hdw->i2c_adap); pvr2_tda10048_attach()
353 &adap->channel.hdw->i2c_adap, 0x42, pvr2_73xxx_tda18271_8295_attach()
356 &adap->channel.hdw->i2c_adap, pvr2_73xxx_tda18271_8295_attach()
441 &adap->channel.hdw->i2c_adap); pvr2_s5h1409_attach()
451 &adap->channel.hdw->i2c_adap); pvr2_s5h1411_attach()
461 &adap->channel.hdw->i2c_adap, 0x42, pvr2_tda18271_8295_attach()
464 &adap->channel.hdw->i2c_adap, pvr2_tda18271_8295_attach()
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| H A D | Makefile | 9 pvrusb2-main.o pvrusb2-hdw.o pvrusb2-v4l2.o \
|
| H A D | pvrusb2-cs53l32a.h | 30 interact through the interface provided by pvrusb2-hdw.h.
35 #include "pvrusb2-hdw-internal.h"
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| H A D | pvrusb2-cx2584x-v4l.h | 31 pvrusb2-hdw.h.
37 #include "pvrusb2-hdw-internal.h"
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| H A D | pvrusb2-video-v4l.h | 30 interact through the interface provided by pvrusb2-hdw.h.
35 #include "pvrusb2-hdw-internal.h"
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| H A D | pvrusb2-wm8775.h | 31 interface provided by pvrusb2-hdw.h.
37 #include "pvrusb2-hdw-internal.h"
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| H A D | pvrusb2-dvb.c | 27 #include "pvrusb2-hdw-internal.h"
28 #include "pvrusb2-hdw.h"
125 pvr2_hdw_set_streaming(adap->channel.hdw, 0); pvr2_dvb_stream_end()
177 ret = pvr2_hdw_set_streaming(adap->channel.hdw, 1); pvr2_dvb_stream_do_start()
261 THIS_MODULE/*&hdw->usb_dev->owner*/, pvr2_dvb_adapter_init()
262 &adap->channel.hdw->usb_dev->dev, pvr2_dvb_adapter_init()
324 struct pvr2_hdw *hdw = adap->channel.hdw; pvr2_dvb_frontend_init() local
325 const struct pvr2_dvb_props *dvb_props = hdw->hdw_desc->dvb_props; pvr2_dvb_frontend_init()
412 if (!pvr->hdw->hdw_desc->dvb_props) { pvr2_dvb_create()
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| H A D | pvrusb2-audio.h | 25 #include "pvrusb2-hdw-internal.h"
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| H A D | pvrusb2-sysfs.c | 24 #include "pvrusb2-hdw.h"
269 pvr2_hdw_commit_ctl(cip->chptr->channel.hdw); store_val_any()
308 cptr = pvr2_hdw_get_ctrl_by_index(sfp->channel.hdw,ctl_id); pvr2_sysfs_add_control()
484 cnt = pvr2_hdw_get_ctrl_count(sfp->channel.hdw); pvr2_sysfs_add_controls()
570 pvr2_hdw_v4l_get_minor_number(sfp->channel.hdw, v4l_minor_number_show()
582 pvr2_hdw_get_bus_info(sfp->channel.hdw)); bus_info_show()
593 pvr2_hdw_get_type(sfp->channel.hdw)); hdw_name_show()
604 pvr2_hdw_get_desc(sfp->channel.hdw)); hdw_desc_show()
616 pvr2_hdw_v4l_get_minor_number(sfp->channel.hdw, v4l_radio_minor_number_show()
628 pvr2_hdw_get_unit_number(sfp->channel.hdw)); unit_number_show()
639 usb_dev = pvr2_hdw_get_dev(sfp->channel.hdw); class_dev_create()
649 pvr2_hdw_get_device_identifier(sfp->channel.hdw)); class_dev_create()
821 pvr2_hdw_trigger_module_log(sfp->channel.hdw); debuginfo_show()
822 return pvr2_debugifc_print_info(sfp->channel.hdw,buf,PAGE_SIZE); debuginfo_show()
832 return pvr2_debugifc_print_status(sfp->channel.hdw,buf,PAGE_SIZE); debugcmd_show()
846 ret = pvr2_debugifc_docmd(sfp->channel.hdw,buf,count); debugcmd_store()
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| H A D | pvrusb2-context.h | 46 struct pvr2_hdw *hdw; member in struct:pvr2_context
63 struct pvr2_hdw *hdw; member in struct:pvr2_channel
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| H A D | pvrusb2-hdw.h | 278 int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *);
279 int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *);
280 int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *);
281 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val);
282 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val);
319 void pvr2_hdw_get_debug_info_unlocked(const struct pvr2_hdw *hdw,
326 void pvr2_hdw_get_debug_info_locked(struct pvr2_hdw *hdw,
331 unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw,
335 void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw);
340 int pvr2_upload_firmware2(struct pvr2_hdw *hdw);
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| H A D | pvrusb2-main.c | 28 #include "pvrusb2-hdw.h"
79 "Failed to create hdw handler"); pvr_probe()
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| H A D | pvrusb2-hdw-internal.h | 30 private, internal header. This means that pvrusb2-hdw, pvrusb2-encoder,
39 #include "pvrusb2-hdw.h"
75 in pvrusb2-hdw.c. */
138 struct pvr2_hdw *hdw; member in struct:pvr2_ctrl
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| H A D | pvrusb2-devattr.h | 89 constraints). See the top of pvrusb2-hdw.c for where this is
|
| /linux-4.4.14/arch/x86/include/asm/uv/ |
| H A D | uv_hub.h | 87 * pppppppppplc0cch Nehalem-EX (12 bits in hdw reg)
88 * ppppppppplcc0cch Westmere-EX (12 bits in hdw reg)
89 * pppppppppppcccch SandyBridge (15 bits in hdw reg)
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| /linux-4.4.14/drivers/infiniband/hw/qib/ |
| H A D | qib_mad.c | 283 unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */ subn_get_nodeinfo()
319 unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */ subn_get_guidinfo()
483 /* IB numbers ports from 1, hdw from 0 */ subn_get_portinfo()
624 unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */ subn_set_guidinfo()
682 /* IB numbers ports from 1, hdw from 0 */ subn_set_portinfo()
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| H A D | qib.h | 1231 unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */ to_iport()
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| /linux-4.4.14/drivers/misc/sgi-gru/ |
| H A D | grufault.c | 564 prefetchw(tfh); /* Helps on hdw, required for emulator */ for_each_cbr_in_tfm()
633 prefetchw(tfh); /* Helps on hdw, required for emulator */ gru_user_dropin()
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| /linux-4.4.14/drivers/scsi/lpfc/ |
| H A D | lpfc_attr.c | 66 * @hdw: ascii string holding converted integer plus a string terminator.
79 lpfc_jedec_to_ascii(int incr, char hdw[]) lpfc_jedec_to_ascii() argument
85 hdw[7 - i] = 0x30 + j; lpfc_jedec_to_ascii()
87 hdw[7 - i] = 0x61 + j - 10; lpfc_jedec_to_ascii()
90 hdw[8] = 0; lpfc_jedec_to_ascii()
384 char hdw[9]; lpfc_hdw_show() local
390 lpfc_jedec_to_ascii(vp->rev.biuRev, hdw); lpfc_hdw_show()
391 return snprintf(buf, PAGE_SIZE, "%s\n", hdw); lpfc_hdw_show()
2049 static DEVICE_ATTR(hdw, S_IRUGO, lpfc_hdw_show, NULL);
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| /linux-4.4.14/drivers/staging/rdma/hfi1/ |
| H A D | hfi.h | 1461 unsigned pidx = port - 1; /* IB number port from 1, hdw from 0 */ to_iport()
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