/linux-4.4.14/drivers/gpu/drm/gma500/ |
H A D | mdfld_tpo_vid.c | 42 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; tpo_vid_get_config_mode() 44 mode->hsync_start = mode->hdisplay + tpo_vid_get_config_mode() 50 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | tpo_vid_get_config_mode() 62 dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay); tpo_vid_get_config_mode() 72 mode->hdisplay = 864; tpo_vid_get_config_mode()
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H A D | oaktrail_lvds.c | 144 (mode->hdisplay != adjusted_mode->crtc_hdisplay)) { oaktrail_lvds_mode_set() 146 (mode->hdisplay * adjusted_mode->crtc_vdisplay)) oaktrail_lvds_mode_set() 149 mode->vdisplay) > (mode->hdisplay * oaktrail_lvds_mode_set() 238 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; oaktrail_lvds_get_configuration_mode() 240 mode->hsync_start = mode->hdisplay + \ oaktrail_lvds_get_configuration_mode() 246 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ oaktrail_lvds_get_configuration_mode() 258 printk(KERN_INFO "hdisplay is %d\n", mode->hdisplay); oaktrail_lvds_get_configuration_mode()
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H A D | mdfld_tmd_vid.c | 45 mode->hdisplay = (ti->hactive_hi << 8) | ti->hactive_lo; tmd_vid_get_config_mode() 47 mode->hsync_start = mode->hdisplay + \ tmd_vid_get_config_mode() 53 mode->htotal = mode->hdisplay + ((ti->hblank_hi << 8) | \ tmd_vid_get_config_mode() 65 dev_dbg(dev->dev, "hdisplay is %d\n", mode->hdisplay); tmd_vid_get_config_mode() 75 mode->hdisplay = 480; tmd_vid_get_config_mode()
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H A D | cdv_intel_lvds.c | 264 if (mode->hdisplay > fixed_mode->hdisplay) cdv_intel_lvds_mode_valid() 300 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; cdv_intel_lvds_mode_fixup() 373 if (mode->hdisplay != adjusted_mode->hdisplay || cdv_intel_lvds_mode_set() 491 if (crtc->saved_mode.hdisplay != 0 && cdv_intel_lvds_set_property()
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H A D | psb_intel_lvds.c | 366 if (mode->hdisplay > fixed_mode->hdisplay) psb_intel_lvds_mode_valid() 416 adjusted_mode->hdisplay = panel_fixed_mode->hdisplay; psb_intel_lvds_mode_fixup() 488 if (mode->hdisplay != adjusted_mode->hdisplay || psb_intel_lvds_mode_set() 611 if (crtc->saved_mode.hdisplay != 0 && psb_intel_lvds_set_property()
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H A D | mdfld_dsi_dpi.c | 435 pclk_hactive = mode->hdisplay; mdfld_dsi_dpi_timing_calculation() 436 pclk_hfp = mode->hsync_start - mode->hdisplay; mdfld_dsi_dpi_timing_calculation() 519 mode->vdisplay << 16 | mode->hdisplay); mdfld_dsi_dpi_controller_init() 696 adjusted_mode->hdisplay = fixed_mode->hdisplay; mdfld_dsi_dpi_mode_fixup() 753 mode->vdisplay << 16 | mode->hdisplay); mdfld_mipi_set_video_timing() 797 REG_WRITE(HTOTAL_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); mdfld_set_pipe_timing() 798 REG_WRITE(HBLANK_A, ((mode->htotal - 1) << 16) | (mode->hdisplay - 1)); mdfld_set_pipe_timing() 808 ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); mdfld_set_pipe_timing() 873 ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); mdfld_dsi_dpi_mode_set()
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H A D | mdfld_dsi_output.c | 283 if (gma_crtc->saved_mode.hdisplay != 0 && mdfld_dsi_connector_set_property() 345 fixed_mode->hdisplay, fixed_mode->vdisplay); mdfld_dsi_connector_get_modes() 375 if (mode->hdisplay != fixed_mode->hdisplay) mdfld_dsi_connector_mode_valid()
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H A D | intel_bios.c | 162 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | fill_detail_timing_data() 164 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + fill_detail_timing_data() 168 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + fill_detail_timing_data()
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H A D | psb_intel_display.c | 288 ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); psb_intel_crtc_mode_set() 291 ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); psb_intel_crtc_mode_set() 416 mode->hdisplay = (htot & 0xffff) + 1; psb_intel_crtc_mode_get()
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H A D | tc35876x-dsi-lvds.c | 588 mode->hdisplay = 1280; tc35876x_get_config_mode() 598 dev_info(&dev->pdev->dev, "hdisplay(w) = %d\n", mode->hdisplay); tc35876x_get_config_mode()
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H A D | cdv_intel_dp.c | 519 if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) cdv_intel_dp_mode_valid() 878 adjusted_mode->hdisplay = fixed_mode->hdisplay; cdv_intel_fixed_panel_mode() 1094 if (mode->hdisplay != adjusted_mode->hdisplay || cdv_intel_dp_mode_set()
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H A D | psb_intel_sdvo.c | 696 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || psb_intel_sdvo_create_preferred_input_timing() 773 mode->hdisplay = dtd->part1.h_active; psb_intel_sdvo_get_mode_from_dtd() 774 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; psb_intel_sdvo_get_mode_from_dtd() 775 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off; psb_intel_sdvo_get_mode_from_dtd() 779 mode->htotal = mode->hdisplay + dtd->part1.h_blank; psb_intel_sdvo_get_mode_from_dtd() 935 mode->hdisplay, psb_intel_sdvo_set_input_timings_for_mode() 1176 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) psb_intel_sdvo_mode_valid()
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H A D | cdv_intel_hdmi.c | 191 if (crtc->saved_mode.hdisplay != 0 && cdv_hdmi_set_property()
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H A D | cdv_intel_display.c | 813 ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); cdv_intel_crtc_mode_set() 816 ((mode->hdisplay - 1) << 16) | (mode->vdisplay - 1)); cdv_intel_crtc_mode_set() 960 mode->hdisplay = (htot & 0xffff) + 1; cdv_intel_crtc_mode_get()
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H A D | mdfld_intel_display.c | 708 adjusted_mode->hdisplay); mdfld_crtc_mode_set() 725 dev_dbg(dev->dev, "hdisplay = %d\n", mdfld_crtc_mode_set() 726 mode->hdisplay); mdfld_crtc_mode_set()
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H A D | oaktrail_hdmi.c | 345 REG_WRITE(dspsize_reg, ((mode->vdisplay - 1) << 16) | (mode->hdisplay - 1)); oaktrail_crtc_hdmi_mode_set()
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/linux-4.4.14/drivers/gpu/drm/panel/ |
H A D | panel-simple.c | 127 m->hdisplay, m->vdisplay, m->vrefresh); panel_simple_get_fixed_modes() 374 .hdisplay = 800, 399 .hdisplay = 1024, 422 .hdisplay = 1280, 445 .hdisplay = 1366, 469 .hdisplay = 1366, 492 .hdisplay = 1366, 515 .hdisplay = 1920, 543 .hdisplay = 1024, 571 .hdisplay = 1366, 594 .hdisplay = 1366, 617 .hdisplay = 640, 641 .hdisplay = 800, 665 .hdisplay = 800, 689 .hdisplay = 480, 766 .hdisplay = 800, 789 .hdisplay = 480, 814 .hdisplay = 1280, 837 .hdisplay = 1366, 861 .hdisplay = 1366, 884 .hdisplay = 1024, 907 .hdisplay = 800, 931 .hdisplay = 2560, 954 .hdisplay = 480, 1008 .hdisplay = 480, 1032 .hdisplay = 1024, 1055 .hdisplay = 1366, 1078 .hdisplay = 800, 1240 .hdisplay = 1200, 1268 .hdisplay = 800, 1296 .hdisplay = 720, 1324 .hdisplay = 1920,
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H A D | panel-sharp-lq101r1sx01.c | 142 err = mipi_dsi_dcs_set_column_address(left, 0, mode->hdisplay / 2 - 1); sharp_setup_symmetrical_split() 154 err = mipi_dsi_dcs_set_column_address(right, mode->hdisplay / 2, sharp_setup_symmetrical_split() 155 mode->hdisplay - 1); sharp_setup_symmetrical_split() 278 .hdisplay = 2560, 296 default_mode.hdisplay, default_mode.vdisplay, sharp_panel_get_modes()
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H A D | panel-lg-lg4573.c | 201 .hdisplay = 480, 220 default_mode.hdisplay, default_mode.vdisplay, lg4573_get_modes()
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/linux-4.4.14/drivers/gpu/drm/ |
H A D | drm_modes.c | 55 mode->hdisplay, mode->hsync_start, drm_mode_debug_printmodeline() 128 * @hdisplay: hdisplay size 136 * according to the hdisplay, vdisplay, vrefresh. 149 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, drm_cvt_mode() argument 187 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); drm_cvt_mode() 196 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; drm_cvt_mode() 218 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) drm_cvt_mode() 220 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) drm_cvt_mode() 222 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) drm_cvt_mode() 224 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) drm_cvt_mode() 226 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) drm_cvt_mode() 278 hblank = drm_mode->hdisplay * hblank_percentage / drm_cvt_mode() 282 drm_mode->htotal = drm_mode->hdisplay + hblank; drm_cvt_mode() 283 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; drm_cvt_mode() 316 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; drm_cvt_mode() 318 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; drm_cvt_mode() 349 * @hdisplay: hdisplay size 368 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, drm_gtf_mode_complex() argument 409 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; drm_gtf_mode_complex() 508 drm_mode->hdisplay = hdisplay_rnd; drm_gtf_mode_complex() 537 * @hdisplay: hdisplay size 567 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, drm_gtf_mode() argument 570 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, drm_gtf_mode() 587 dmode->hdisplay = vm->hactive; drm_display_mode_from_videomode() 588 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; drm_display_mode_from_videomode() 628 vm->hactive = dmode->hdisplay; drm_display_mode_to_videomode() 629 vm->hfront_porch = dmode->hsync_start - dmode->hdisplay; drm_display_mode_to_videomode() 698 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay> 706 mode->hdisplay, mode->vdisplay, drm_mode_set_name() 791 p->crtc_hdisplay = p->hdisplay; drm_mode_set_crtcinfo() 942 if (mode1->hdisplay == mode2->hdisplay && drm_mode_equal_no_clocks_no_stereo() 976 if (mode->hdisplay == 0 || drm_mode_validate_basic() 977 mode->hsync_start < mode->hdisplay || drm_mode_validate_basic() 1010 if (maxX > 0 && mode->hdisplay > maxX) drm_mode_validate_size() 1130 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; drm_mode_compare() 1420 WARN(in->hdisplay > USHRT_MAX || in->hsync_start > USHRT_MAX || drm_mode_convert_to_umode() 1428 out->hdisplay = in->hdisplay; drm_mode_convert_to_umode() 1470 out->hdisplay = in->hdisplay; drm_mode_convert_umode()
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H A D | drm_edid.c | 1446 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1503 return (mode->htotal - mode->hdisplay == 160) && mode_is_rb() 1504 (mode->hsync_end - mode->hdisplay == 80) && mode_is_rb() 1529 if (hsize != ptr->hdisplay) drm_mode_find_dmt() 1724 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ drm_mode_std() 1756 if (m->hdisplay == hsize && m->vdisplay == vsize && drm_mode_std() 1764 mode->hdisplay = 1366; drm_mode_std() 1844 if ((mode->hdisplay == cea_interlaced[i].w) && drm_mode_do_interlace_quirk() 1919 mode->hdisplay = hactive; drm_mode_detailed() 1920 mode->hsync_start = mode->hdisplay + hsync_offset; drm_mode_detailed() 1922 mode->htotal = mode->hdisplay + hblank; drm_mode_detailed() 2035 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) mode_in_range() 2051 if (mode->hdisplay == m->hdisplay && valid_inferred_mode() 2055 if (mode->hdisplay <= m->hdisplay && valid_inferred_mode() 2089 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { fixup_mode_1366x768() 2090 mode->hdisplay = 1366; fixup_mode_1366x768() 2606 if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160) hdmi_mode_alternate_clock() 2782 return mode->hdisplay == stereo_mode->width && stereo_match_mandatory() 3836 * @hdisplay: the horizontal display limit 3840 * hdisplay/vdisplay is not beyond the given limit, it will be added. 3845 int hdisplay, int vdisplay) drm_add_modes_noedid() 3852 if (hdisplay < 0) drm_add_modes_noedid() 3853 hdisplay = 0; drm_add_modes_noedid() 3859 if (hdisplay && vdisplay) { drm_add_modes_noedid() 3865 if (ptr->hdisplay > hdisplay || drm_add_modes_noedid() 3896 if (mode->hdisplay == hpref && drm_set_preferred_mode() 3844 drm_add_modes_noedid(struct drm_connector *connector, int hdisplay, int vdisplay) drm_add_modes_noedid() argument
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H A D | drm_fb_helper.c | 1414 sizes.surface_width = max_t(u32, desired_mode->hdisplay + x, sizes.surface_width); drm_fb_helper_single_fb_probe() 1428 sizes.fb_width = min_t(u32, desired_mode->hdisplay + x, sizes.fb_width); drm_fb_helper_single_fb_probe() 1617 if (mode->hdisplay > width || drm_has_preferred_mode() 1653 if (mode->hdisplay != cmdline_mode->xres || drm_pick_cmdline_mode() 1816 hoffset += modes[i]->hdisplay; drm_get_tile_offsets()
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H A D | drm_crtc_helper.c | 1009 plane_state->crtc_w = crtc->mode.hdisplay; drm_helper_crtc_mode_set_base() 1013 plane_state->src_w = crtc->mode.hdisplay << 16; drm_helper_crtc_mode_set_base()
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H A D | drm_atomic_helper.c | 1752 int hdisplay, vdisplay; __drm_atomic_helper_set_config() local 1795 drm_crtc_get_hv_timing(set->mode, &hdisplay, &vdisplay); __drm_atomic_helper_set_config() 1801 primary_state->crtc_w = hdisplay; __drm_atomic_helper_set_config() 1805 primary_state->src_h = hdisplay << 16; __drm_atomic_helper_set_config() 1809 primary_state->src_w = hdisplay << 16; __drm_atomic_helper_set_config()
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H A D | drm_crtc.c | 2556 * drm_crtc_get_hv_timing - Fetches hdisplay/vdisplay for given mode 2558 * @hdisplay: hdisplay value to fill in 2565 int *hdisplay, int *vdisplay) drm_crtc_get_hv_timing() 2571 *hdisplay = adjusted.crtc_hdisplay; drm_crtc_get_hv_timing() 2591 int hdisplay, vdisplay; drm_crtc_check_viewport() local 2593 drm_crtc_get_hv_timing(mode, &hdisplay, &vdisplay); drm_crtc_check_viewport() 2598 swap(hdisplay, vdisplay); drm_crtc_check_viewport() 2601 hdisplay << 16, vdisplay << 16, fb); drm_crtc_check_viewport() 2564 drm_crtc_get_hv_timing(const struct drm_display_mode *mode, int *hdisplay, int *vdisplay) drm_crtc_get_hv_timing() argument
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H A D | drm_plane_helper.c | 251 .x2 = crtc->mode.hdisplay, drm_primary_helper_update()
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/linux-4.4.14/drivers/gpu/drm/nouveau/dispnv04/ |
H A D | tvnv17.c | 207 for (tv_mode = nv17_tv_modes; tv_mode->hdisplay; tv_mode++) { nv17_tv_get_ld_modes() 219 if (mode->hdisplay == tv_norm->tv_enc_mode.hdisplay && nv17_tv_get_ld_modes() 237 int hdisplay; nv17_tv_get_hd_modes() member in struct:__anon4304 253 if (modes[i].hdisplay > output_mode->hdisplay || nv17_tv_get_hd_modes() 257 if (modes[i].hdisplay == output_mode->hdisplay && nv17_tv_get_hd_modes() 263 mode = drm_cvt_mode(encoder->dev, modes[i].hdisplay, nv17_tv_get_hd_modes() 270 if (output_mode->hdisplay <= 720 nv17_tv_get_hd_modes() 271 || output_mode->hdisplay >= 1920) { nv17_tv_get_hd_modes() 273 mode->hsync_start = (mode->hdisplay + (mode->htotal nv17_tv_get_hd_modes() 274 - mode->hdisplay) * 9 / 10) & ~7; nv17_tv_get_hd_modes() 315 if (mode->hdisplay > output_mode->hdisplay || nv17_tv_mode_valid() 533 regs->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; nv17_tv_mode_set() 538 regs->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay + nv17_tv_mode_set() 539 max((output_mode->hdisplay-600)/40 - 1, 1); nv17_tv_mode_set()
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H A D | dfp.c | 191 mode->hdisplay > nv_connector->native_mode->hdisplay || nv04_dfp_mode_fixup() 299 regp->fp_horiz_regs[FP_DISPLAY_END] = output_mode->hdisplay - 1; nv04_dfp_mode_set() 302 (output_mode->hsync_start - output_mode->hdisplay) >= nv04_dfp_mode_set() 304 regp->fp_horiz_regs[FP_CRTC] = output_mode->hdisplay; nv04_dfp_mode_set() 310 regp->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - 1; nv04_dfp_mode_set() 333 else if (adjusted_mode->hdisplay == output_mode->hdisplay && nv04_dfp_mode_set() 373 mode_ratio = (1 << 12) * adjusted_mode->hdisplay / adjusted_mode->vdisplay; nv04_dfp_mode_set() 374 panel_ratio = (1 << 12) * output_mode->hdisplay / output_mode->vdisplay; nv04_dfp_mode_set() 392 diff = output_mode->hdisplay - nv04_dfp_mode_set() 403 scale = (1 << 12) * adjusted_mode->hdisplay / output_mode->hdisplay; nv04_dfp_mode_set() 409 (1 << 12) * output_mode->hdisplay / mode_ratio; nv04_dfp_mode_set()
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H A D | tvmodesnv17.c | 326 uint64_t rs[] = {mode->hdisplay * id3, tv_setup_filter() 329 do_div(rs[0], overscan * tv_norm->tv_enc_mode.hdisplay); tv_setup_filter() 560 hmargin = (output_mode->hdisplay - crtc_mode->hdisplay) / 2; nv17_ctv_update_rescaler() 563 hmargin = interpolate(0, min(hmargin, output_mode->hdisplay/20), nv17_ctv_update_rescaler() 568 hratio = crtc_mode->hdisplay * 0x800 / nv17_ctv_update_rescaler() 569 (output_mode->hdisplay - 2*hmargin); nv17_ctv_update_rescaler() 574 regs->fp_horiz_regs[FP_VALID_END] = output_mode->hdisplay - hmargin - 1; nv17_ctv_update_rescaler()
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H A D | tvnv17.h | 98 int hdisplay; member in struct:nv17_tv_norm_params::__anon4306::__anon4307
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/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
H A D | amdgpu_encoders.c | 152 unsigned hblank = native_mode->htotal - native_mode->hdisplay; amdgpu_panel_mode_fixup() 154 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; amdgpu_panel_mode_fixup() 162 adjusted_mode->hdisplay = native_mode->hdisplay; amdgpu_panel_mode_fixup() 165 adjusted_mode->htotal = native_mode->hdisplay + hblank; amdgpu_panel_mode_fixup() 166 adjusted_mode->hsync_start = native_mode->hdisplay + hover; amdgpu_panel_mode_fixup() 175 adjusted_mode->crtc_hdisplay = native_mode->hdisplay; amdgpu_panel_mode_fixup()
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H A D | amdgpu_connectors.c | 410 if (native_mode->hdisplay != 0 && amdgpu_connector_lcd_native_mode() 418 } else if (native_mode->hdisplay != 0 && amdgpu_connector_lcd_native_mode() 427 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); amdgpu_connector_lcd_native_mode() 472 if (common_modes[i].w > native_mode->hdisplay || amdgpu_connector_add_common_modes() 474 (common_modes[i].w == native_mode->hdisplay && amdgpu_connector_add_common_modes() 642 if (mode->hdisplay != native_mode->hdisplay || amdgpu_connector_fixup_lcd_native_mode() 651 if (mode->hdisplay == native_mode->hdisplay && amdgpu_connector_fixup_lcd_native_mode() 709 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) amdgpu_connector_lvds_mode_valid() 719 if ((mode->hdisplay > native_mode->hdisplay) || amdgpu_connector_lvds_mode_valid() 725 if ((mode->hdisplay != native_mode->hdisplay) || amdgpu_connector_lvds_mode_valid() 751 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) amdgpu_connector_lvds_detect() 1372 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) amdgpu_connector_dp_detect() 1442 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) amdgpu_connector_dp_mode_valid() 1452 if ((mode->hdisplay > native_mode->hdisplay) || amdgpu_connector_dp_mode_valid() 1458 if ((mode->hdisplay != native_mode->hdisplay) || amdgpu_connector_dp_mode_valid()
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H A D | amdgpu_display.c | 672 if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */ is_hdtv_mode() 707 else if (mode->hdisplay < amdgpu_encoder->native_mode.hdisplay || amdgpu_crtc_scaling_mode_fixup() 718 src_h = crtc->mode.hdisplay; amdgpu_crtc_scaling_mode_fixup() 719 dst_h = amdgpu_crtc->native_mode.hdisplay; amdgpu_crtc_scaling_mode_fixup() 730 amdgpu_crtc->h_border = (mode->hdisplay >> 5) + 16; amdgpu_crtc_scaling_mode_fixup() 738 src_h = crtc->mode.hdisplay; amdgpu_crtc_scaling_mode_fixup() 739 dst_h = crtc->mode.hdisplay - (amdgpu_crtc->h_border * 2); amdgpu_crtc_scaling_mode_fixup()
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H A D | atombios_encoders.c | 1934 lvds->native_mode.hdisplay = amdgpu_atombios_encoder_get_lcd_info() 1938 lvds->native_mode.htotal = lvds->native_mode.hdisplay + amdgpu_atombios_encoder_get_lcd_info() 1940 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + amdgpu_atombios_encoder_get_lcd_info()
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H A D | dce_v10_0.c | 2249 viewport_w = crtc->mode.hdisplay; dce_v10_0_crtc_do_set_base()
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H A D | dce_v11_0.c | 2237 viewport_w = crtc->mode.hdisplay; dce_v11_0_crtc_do_set_base()
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H A D | dce_v8_0.c | 2170 viewport_w = crtc->mode.hdisplay; dce_v8_0_crtc_do_set_base()
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/linux-4.4.14/drivers/gpu/drm/virtio/ |
H A D | virtgpu_display.c | 149 crtc->mode.hdisplay, crtc->mode.vdisplay); virtio_gpu_page_flip() 153 cpu_to_le32(crtc->mode.hdisplay), virtio_gpu_page_flip() 158 crtc->mode.hdisplay, virtio_gpu_page_flip() 161 crtc->mode.hdisplay, virtio_gpu_page_flip() 254 crtc->mode.hdisplay, virtio_gpu_crtc_mode_set_nofb() 345 if (mode->hdisplay == XRES_DEF && mode->vdisplay == YRES_DEF) virtio_gpu_conn_mode_valid() 347 if (mode->hdisplay <= width && mode->hdisplay >= width - 16 && virtio_gpu_conn_mode_valid() 351 DRM_DEBUG("del mode: %dx%d\n", mode->hdisplay, mode->vdisplay); virtio_gpu_conn_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/radeon/ |
H A D | radeon_encoders.c | 326 unsigned hblank = native_mode->htotal - native_mode->hdisplay; radeon_panel_mode_fixup() 328 unsigned hover = native_mode->hsync_start - native_mode->hdisplay; radeon_panel_mode_fixup() 337 adjusted_mode->hdisplay = native_mode->hdisplay; radeon_panel_mode_fixup() 341 adjusted_mode->htotal = native_mode->hdisplay + hblank; radeon_panel_mode_fixup() 342 adjusted_mode->hsync_start = native_mode->hdisplay + hover; radeon_panel_mode_fixup() 352 adjusted_mode->crtc_hdisplay = native_mode->hdisplay; radeon_panel_mode_fixup()
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H A D | radeon_connectors.c | 489 if (native_mode->hdisplay != 0 && radeon_fp_native_mode() 497 } else if (native_mode->hdisplay != 0 && radeon_fp_native_mode() 506 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); radeon_fp_native_mode() 550 if (common_modes[i].w > native_mode->hdisplay || radeon_add_common_modes() 552 (common_modes[i].w == native_mode->hdisplay && radeon_add_common_modes() 792 if (mode->hdisplay != native_mode->hdisplay || radeon_fixup_lvds_native_mode() 801 if (mode->hdisplay == native_mode->hdisplay && radeon_fixup_lvds_native_mode() 859 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) radeon_lvds_mode_valid() 869 if ((mode->hdisplay > native_mode->hdisplay) || radeon_lvds_mode_valid() 875 if ((mode->hdisplay != native_mode->hdisplay) || radeon_lvds_mode_valid() 903 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) radeon_lvds_detect() 1139 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) radeon_tv_mode_valid() 1687 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) radeon_dp_detect() 1778 if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) radeon_dp_mode_valid() 1788 if ((mode->hdisplay > native_mode->hdisplay) || radeon_dp_mode_valid() 1794 if ((mode->hdisplay != native_mode->hdisplay) || radeon_dp_mode_valid()
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H A D | radeon_legacy_crtc.c | 51 int xres = mode->hdisplay; radeon_legacy_rmx_mode_set() 109 if (native_mode->hdisplay == 0 || radeon_legacy_rmx_mode_set() 114 if (xres > native_mode->hdisplay) radeon_legacy_rmx_mode_set() 115 xres = native_mode->hdisplay; radeon_legacy_rmx_mode_set() 119 if (xres == native_mode->hdisplay) radeon_legacy_rmx_mode_set() 133 / native_mode->hdisplay + 1; radeon_legacy_rmx_mode_set() 137 ((native_mode->hdisplay/8-1) << 16)); radeon_legacy_rmx_mode_set() 190 (((native_mode->hdisplay / 8) & 0x1ff) << 16)); radeon_legacy_rmx_mode_set()
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H A D | rs690.c | 231 if (mode1->hdisplay > mode2->hdisplay) { rs690_line_buffer_adjust() 232 if (mode1->hdisplay > 2560) rs690_line_buffer_adjust() 236 } else if (mode2->hdisplay > mode1->hdisplay) { rs690_line_buffer_adjust() 237 if (mode2->hdisplay > 2560) rs690_line_buffer_adjust()
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H A D | radeon_display.c | 1714 if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */ is_hdtv_mode() 1752 else if (mode->hdisplay < radeon_encoder->native_mode.hdisplay || radeon_crtc_scaling_mode_fixup() 1763 src_h = crtc->mode.hdisplay; radeon_crtc_scaling_mode_fixup() 1764 dst_h = radeon_crtc->native_mode.hdisplay; radeon_crtc_scaling_mode_fixup() 1776 radeon_crtc->h_border = (mode->hdisplay >> 5) + 16; radeon_crtc_scaling_mode_fixup() 1784 src_h = crtc->mode.hdisplay; radeon_crtc_scaling_mode_fixup() 1785 dst_h = crtc->mode.hdisplay - (radeon_crtc->h_border * 2); radeon_crtc_scaling_mode_fixup()
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H A D | radeon_combios.c | 1134 lvds->native_mode.hdisplay = radeon_legacy_get_lvds_info_from_regs() 1138 lvds->native_mode.hdisplay = radeon_legacy_get_lvds_info_from_regs() 1141 if ((lvds->native_mode.hdisplay < 640) || radeon_legacy_get_lvds_info_from_regs() 1143 lvds->native_mode.hdisplay = 640; radeon_legacy_get_lvds_info_from_regs() 1164 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, radeon_legacy_get_lvds_info_from_regs() 1195 lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19); radeon_combios_get_lvds_info() 1198 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, radeon_combios_get_lvds_info() 1256 if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) && radeon_combios_get_lvds_info() 1260 if (hss > lvds->native_mode.hdisplay) radeon_combios_get_lvds_info() 1263 lvds->native_mode.htotal = lvds->native_mode.hdisplay + radeon_combios_get_lvds_info() 1265 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + radeon_combios_get_lvds_info()
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H A D | atombios_crtc.c | 1419 viewport_w = crtc->mode.hdisplay; dce4_crtc_do_set_base() 1622 viewport_w = crtc->mode.hdisplay; avivo_crtc_do_set_base()
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H A D | radeon_atombios.c | 1651 lvds->native_mode.hdisplay = radeon_atombios_get_lvds_info() 1655 lvds->native_mode.htotal = lvds->native_mode.hdisplay + radeon_atombios_get_lvds_info() 1657 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + radeon_atombios_get_lvds_info()
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H A D | r100.c | 3465 stop_req = mode1->hdisplay * pixel_bytes1 / 16; r100_bandwidth_update() 3545 stop_req = mode2->hdisplay * pixel_bytes2 / 16; r100_bandwidth_update()
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/linux-4.4.14/drivers/gpu/drm/omapdrm/ |
H A D | omap_connector.c | 51 mode->hdisplay = timings->x_res; copy_timings_omap_to_drm() 52 mode->hsync_start = mode->hdisplay + timings->hfp; copy_timings_omap_to_drm() 82 timings->x_res = mode->hdisplay; copy_timings_drm_to_omap() 83 timings->hfp = mode->hsync_start - mode->hdisplay; copy_timings_drm_to_omap() 247 mode->hdisplay, mode->hsync_start, omap_connector_mode_valid()
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H A D | omap_plane.c | 174 if (state->crtc_x + state->crtc_w > crtc_state->adjusted_mode.hdisplay) omap_plane_atomic_check()
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H A D | omap_crtc.c | 384 mode->hdisplay, mode->hsync_start, mode->hsync_end, mode->htotal, omap_crtc_mode_set_nofb()
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/linux-4.4.14/include/drm/ |
H A D | drm_modes.h | 85 .hdisplay = (hd), .hsync_start = (hss), .hsync_end = (hse), \ 111 int hdisplay; member in struct:drm_display_mode 193 int hdisplay, int vdisplay, int vrefresh, 197 int hdisplay, int vdisplay, int vrefresh, 200 int hdisplay, int vdisplay,
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H A D | drm_crtc.h | 1274 int *hdisplay, int *vdisplay); 1454 int hdisplay, int vdisplay);
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/linux-4.4.14/drivers/gpu/drm/i915/ |
H A D | dvo_ns2501.c | 530 ("is mode valid (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d)\n", ns2501_mode_valid() 531 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); ns2501_mode_valid() 539 if ((mode->hdisplay == 640 && mode->vdisplay == 480 && mode->clock == 25175) || ns2501_mode_valid() 540 (mode->hdisplay == 800 && mode->vdisplay == 600 && mode->clock == 40000) || ns2501_mode_valid() 541 (mode->hdisplay == 1024 && mode->vdisplay == 768 && mode->clock == 65000)) { ns2501_mode_valid() 557 ("set mode (hdisplay=%d,htotal=%d,vdisplay=%d,vtotal=%d).\n", ns2501_mode_set() 558 mode->hdisplay, mode->htotal, mode->vdisplay, mode->vtotal); ns2501_mode_set() 562 "hdisplay : %d\n" ns2501_mode_set() 590 if (mode->hdisplay == 640 && mode->vdisplay == 480) ns2501_mode_set() 592 else if (mode->hdisplay == 800 && mode->vdisplay == 600) ns2501_mode_set() 594 else if (mode->hdisplay == 1024 && mode->vdisplay == 768) ns2501_mode_set()
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H A D | dvo_ch7017.c | 301 horizontal_active_pixel_input = mode->hdisplay & 0x00ff; ch7017_mode_set() 304 horizontal_active_pixel_output = mode->hdisplay & 0x00ff; ch7017_mode_set() 306 active_input_line_output = ((mode->hdisplay & 0x0700) >> 8) | ch7017_mode_set() 310 (mode->hdisplay & 0x0700) >> 8; ch7017_mode_set()
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H A D | dvo_ivch.c | 417 if (mode->hdisplay != adjusted_mode->crtc_hdisplay || ivch_mode_set() 423 x_ratio = (((mode->hdisplay - 1) << 16) / ivch_mode_set()
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H A D | intel_dsi_pll.c | 91 hactive = mode->hdisplay; dsi_rr_formula() 93 hfp = mode->hsync_start - mode->hdisplay; dsi_rr_formula()
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H A D | intel_dvo.c | 216 if (mode->hdisplay > fixed_mode->hdisplay) intel_dvo_mode_valid()
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H A D | intel_sdvo.c | 791 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width || intel_sdvo_create_preferred_input_timing() 826 width = mode->hdisplay; intel_sdvo_get_dtd_from_mode() 830 h_blank_len = mode->htotal - mode->hdisplay; intel_sdvo_get_dtd_from_mode() 836 h_sync_offset = mode->hsync_start - mode->hdisplay; intel_sdvo_get_dtd_from_mode() 876 mode.hdisplay = dtd->part1.h_active; intel_sdvo_get_mode_from_dtd() 877 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8; intel_sdvo_get_mode_from_dtd() 878 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off; intel_sdvo_get_mode_from_dtd() 882 mode.htotal = mode.hdisplay + dtd->part1.h_blank; intel_sdvo_get_mode_from_dtd() 1088 mode->hdisplay, intel_sdvo_get_preferred_input_mode() 1535 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay) intel_sdvo_mode_valid()
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H A D | intel_bios.c | 90 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) | fill_detail_timing_data() 92 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay + fill_detail_timing_data() 96 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay + fill_detail_timing_data() 248 if (fp_timing->x_res == panel_fixed_mode->hdisplay && parse_lfp_panel_data()
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H A D | intel_dsi.c | 735 if (mode->hdisplay > fixed_mode->hdisplay) intel_dsi_mode_valid() 810 * Program hdisplay and vdisplay on MIPI transcoder. set_dsi_timings()
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H A D | intel_overlay.c | 924 if (rec->dst_x < mode->hdisplay && check_overlay_dst() 925 rec->dst_x + rec->dst_width <= mode->hdisplay && check_overlay_dst() 1161 if (mode->hdisplay > 1024 && intel_overlay_put_image()
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H A D | intel_pm.c | 691 int htotal, hdisplay, clock, pixel_size; g4x_compute_wm0() local 705 hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; g4x_compute_wm0() 710 tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8; g4x_compute_wm0() 722 tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8; g4x_compute_wm0() 777 int hdisplay, htotal, pixel_size, clock; g4x_compute_srwm() local 792 hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; g4x_compute_srwm() 797 line_size = hdisplay * pixel_size; g4x_compute_srwm() 1431 int hdisplay = to_intel_crtc(crtc)->config->pipe_src_w; i965_update_wm() local 1440 pixel_size * hdisplay; i965_update_wm() 1578 int hdisplay = to_intel_crtc(enabled)->config->pipe_src_w; i9xx_update_wm() local 1587 pixel_size * hdisplay; i9xx_update_wm() 4120 * surface width = hdisplay for normal plane and 64 for cursor
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H A D | intel_lvds.c | 289 if (mode->hdisplay > fixed_mode->hdisplay) intel_lvds_mode_valid()
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H A D | intel_fbdev.c | 476 modes[i]->hdisplay, modes[i]->vdisplay, intel_fb_initial_config()
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H A D | intel_panel.c | 77 if (scan->hdisplay == fixed_mode->hdisplay && intel_find_panel_downclock()
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H A D | intel_tv.c | 1156 .hdisplay = 1280, 1424 mode_ptr->hdisplay = hactive_s; intel_tv_get_modes()
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H A D | intel_display.c | 7803 pipe_config->base.mode.hdisplay = pipe_config->pipe_src_w; intel_get_pipe_timings() 7809 mode->hdisplay = pipe_config->base.adjusted_mode.crtc_hdisplay; intel_mode_from_pipe_config() 10201 u32 pitch = intel_framebuffer_pitch_for_width(mode->hdisplay, bpp); intel_framebuffer_size_for_mode() 10218 mode_cmd.width = mode->hdisplay; intel_framebuffer_create_for_mode() 10246 if (fb->pitches[0] < intel_framebuffer_pitch_for_width(mode->hdisplay, mode_fits_in_fbdev() 10266 int hdisplay, vdisplay; intel_modeset_setup_plane_state() local 10274 drm_crtc_get_hv_timing(mode, &hdisplay, &vdisplay); intel_modeset_setup_plane_state() 10276 hdisplay = vdisplay = 0; intel_modeset_setup_plane_state() 10284 plane_state->crtc_w = hdisplay; intel_modeset_setup_plane_state() 10288 plane_state->src_w = hdisplay << 16; intel_modeset_setup_plane_state() 10704 mode->hdisplay = (htot & 0xffff) + 1; intel_crtc_mode_get()
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H A D | intel_dp.c | 213 if (mode->hdisplay > fixed_mode->hdisplay) intel_dp_mode_valid()
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H A D | i915_debugfs.c | 2793 mode->hdisplay, mode->hsync_start, intel_seq_print_mode()
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/linux-4.4.14/drivers/gpu/drm/tilcdc/ |
H A D | tilcdc_crtc.c | 303 hfp = mode->hsync_start - mode->hdisplay; tilcdc_crtc_mode_set() 310 mode->hdisplay, mode->vdisplay, hbp, hfp, hsw, vbp, vfp, vsw); tilcdc_crtc_mode_set() 330 reg = (((mode->hdisplay >> 4) - 1) << 4) | tilcdc_crtc_mode_set() 335 reg |= (((mode->hdisplay >> 4) - 1) & 0x40) >> 3; tilcdc_crtc_mode_set() 477 if (mode->hdisplay > tilcdc_crtc_max_width(crtc)) tilcdc_crtc_mode_valid() 481 if (mode->hdisplay & 0xf) tilcdc_crtc_mode_valid() 488 mode->hdisplay, mode->vdisplay, tilcdc_crtc_mode_valid() 492 hfp = mode->hsync_start - mode->hdisplay; tilcdc_crtc_mode_valid() 541 if (mode->hdisplay > priv->max_width) tilcdc_crtc_mode_valid() 545 bandwidth = mode->hdisplay * mode->vdisplay * tilcdc_crtc_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/imx/ |
H A D | ipuv3-crtc.c | 150 dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__, ipu_crtc_mode_set() 151 mode->hdisplay); ipu_crtc_mode_set() 186 ipu_crtc->bus_format, mode->hdisplay); ipu_crtc_mode_set() 203 0, 0, mode->hdisplay, mode->vdisplay, ipu_crtc_mode_set() 204 x, y, mode->hdisplay, mode->vdisplay, ipu_crtc_mode_set()
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H A D | ipuv3-plane.c | 137 if (crtc_x + crtc_w > mode->hdisplay) { ipu_plane_mode_set() 138 if (crtc_x > mode->hdisplay) ipu_plane_mode_set() 140 crtc_w = mode->hdisplay - crtc_x; ipu_plane_mode_set()
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H A D | imx-tve.c | 265 mode->hdisplay, mode->vdisplay); imx_tve_connector_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/exynos/ |
H A D | exynos_hdmi.c | 1015 mode->hdisplay, mode->vdisplay, mode->vrefresh, hdmi_mode_valid() 1099 m->hdisplay, m->vdisplay, m->vrefresh); hdmi_mode_fixup() 1301 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay); hdmi_v13_mode_apply() 1311 val = (m->hsync_start - m->hdisplay - 2); hdmi_v13_mode_apply() 1312 val |= ((m->hsync_end - m->hdisplay - 2) << 10); hdmi_v13_mode_apply() 1342 val = ((m->htotal / 2) + (m->hsync_start - m->hdisplay)); hdmi_v13_mode_apply() 1344 (m->hsync_start - m->hdisplay)) << 12; hdmi_v13_mode_apply() 1375 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_v13_mode_apply() 1376 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); hdmi_v13_mode_apply() 1391 hdmi_reg_writev(hdata, HDMI_H_BLANK_0, 2, m->htotal - m->hdisplay); hdmi_v14_mode_apply() 1425 (m->htotal / 2) + (m->hsync_start - m->hdisplay)); hdmi_v14_mode_apply() 1427 (m->htotal / 2) + (m->hsync_start - m->hdisplay)); hdmi_v14_mode_apply() 1469 m->hsync_start - m->hdisplay - 2); hdmi_v14_mode_apply() 1471 m->hsync_end - m->hdisplay - 2); hdmi_v14_mode_apply() 1493 hdmi_reg_writev(hdata, HDMI_TG_HACT_ST_L, 2, m->htotal - m->hdisplay); hdmi_v14_mode_apply() 1494 hdmi_reg_writev(hdata, HDMI_TG_HACT_SZ_L, 2, m->hdisplay); hdmi_v14_mode_apply() 1576 m->hdisplay, m->vdisplay, hdmi_mode_set()
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H A D | exynos_drm_plane.c | 72 actual_w = exynos_plane_get_size(crtc_x, crtc_w, mode->hdisplay); exynos_plane_mode_set()
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H A D | exynos7_drm_decon.c | 208 VIDTCON4_HOZVAL(mode->hdisplay - 1); decon_commit() 448 if ((plane->crtc_x + plane->crtc_w) > mode->hdisplay) decon_update_plane() 449 plane->crtc_x = mode->hdisplay - plane->crtc_w; decon_update_plane()
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H A D | exynos_mixer.c | 604 val |= MXR_MXR_RES_WIDTH(mode->hdisplay); mixer_graph_buffer() 1104 w = mode->hdisplay; mixer_atomic_check() 1108 mode->hdisplay, mode->vdisplay, mode->vrefresh, mixer_atomic_check()
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H A D | exynos5433_drm_decon.c | 154 VIDTCON2_HOZVAL(m->hdisplay - 1); decon_commit()
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H A D | exynos_drm_fimd.c | 457 VIDTCON2_HOZVAL(mode->hdisplay - 1) | fimd_commit() 459 VIDTCON2_HOZVAL_E(mode->hdisplay - 1); fimd_commit()
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H A D | exynos_drm_dsi.c | 1677 vm->hactive = m->hdisplay; exynos_dsi_mode_set() 1682 vm->hfront_porch = m->hsync_start - m->hdisplay; exynos_dsi_mode_set()
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/linux-4.4.14/drivers/gpu/drm/nouveau/ |
H A D | nouveau_connector.c | 617 if (mode->hdisplay < high_w) nouveau_connector_native_mode() 620 if (mode->hdisplay == high_w && mode->vdisplay < high_h) nouveau_connector_native_mode() 623 if (mode->hdisplay == high_w && mode->vdisplay == high_h && nouveau_connector_native_mode() 627 high_w = mode->hdisplay; nouveau_connector_native_mode() 639 int hdisplay; member in struct:moderec 673 while (mode->hdisplay) { nouveau_connector_scaler_modes_add() 674 if (mode->hdisplay <= native->hdisplay && nouveau_connector_scaler_modes_add() 676 (mode->hdisplay != native->hdisplay || nouveau_connector_scaler_modes_add() 678 m = drm_cvt_mode(dev, mode->hdisplay, mode->vdisplay, nouveau_connector_scaler_modes_add() 842 (mode->hdisplay > nv_connector->native_mode->hdisplay || nouveau_connector_mode_valid()
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H A D | nv50_display.c | 765 oX = omode->hdisplay; nv50_crtc_set_scale() 798 oX = min((u32)umode->hdisplay, oX); nv50_crtc_set_scale() 803 u32 aspect = (umode->hdisplay << 19) / umode->vdisplay; nv50_crtc_set_scale() 806 u32 aspect = (umode->vdisplay << 19) / umode->hdisplay; nv50_crtc_set_scale() 824 evo_data(push, umode->vdisplay << 16 | umode->hdisplay); nv50_crtc_set_scale() 833 evo_data(push, umode->vdisplay << 16 | umode->hdisplay); nv50_crtc_set_scale() 1150 hfrontp = mode->hsync_start - mode->hdisplay; nv50_crtc_mode_set() 1809 max_ac_packet = mode->htotal - mode->hdisplay; nv50_hdmi_mode_set()
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H A D | nouveau_bios.c | 467 mode->hdisplay = ROM16(mode_entry[11]) + 1; nouveau_bios_fp_mode()
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/linux-4.4.14/drivers/gpu/drm/rcar-du/ |
H A D | rcar_du_encoder.c | 85 if (mode->hdisplay != panel_mode->hdisplay || rcar_du_encoder_atomic_check()
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H A D | rcar_du_crtc.c | 159 mode->hdisplay - 19); rcar_du_crtc_set_display_timing() 175 rcar_du_crtc_write(rcrtc, DEWR, mode->hdisplay); rcar_du_crtc_set_display_timing()
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/linux-4.4.14/drivers/gpu/drm/sti/ |
H A D | sti_mixer.c | 101 xds = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); sti_mixer_set_background_area() 173 xds = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); sti_mixer_active_video_area()
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H A D | sti_dvo.c | 123 timing.active_pixels = mode->hdisplay; dvo_awg_generate_code() 124 timing.blanking_pixels = mode->hsync_start - mode->hdisplay; dvo_awg_generate_code()
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H A D | sti_crtc.c | 78 mode->hdisplay, sti_crtc_mode_set()
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H A D | sti_cursor.c | 192 x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); sti_cursor_atomic_update()
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H A D | sti_vtg.c | 132 u32 xstop = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1); vtg_set_output_window()
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H A D | sti_hdmi.c | 196 xmax = sti_vtg_get_pixel_number(hdmi->mode, hdmi->mode.hdisplay); hdmi_active_area()
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/linux-4.4.14/drivers/gpu/drm/bochs/ |
H A D | bochs_hw.c | 155 bochs->xres = mode->hdisplay; bochs_hw_setmode() 158 bochs->stride = mode->hdisplay * (bochs->bpp / 8); bochs_hw_setmode()
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H A D | bochs_kms.c | 218 unsigned long size = mode->hdisplay * mode->vdisplay * 4; bochs_connector_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/fsl-dcu/ |
H A D | fsl_dcu_drm_crtc.c | 97 hfp = mode->hsync_start - mode->hdisplay; fsl_dcu_drm_crtc_mode_set_nofb() 117 DCU_DISP_SIZE_DELTA_X(mode->hdisplay)); fsl_dcu_drm_crtc_mode_set_nofb()
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H A D | fsl_dcu_drm_rgb.c | 118 if (mode->hdisplay & 0xf) fsl_dcu_drm_connector_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/msm/edp/ |
H A D | edp_bridge.c | 66 mode->hdisplay, mode->hsync_start, edp_bridge_mode_set()
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H A D | edp_ctrl.c | 1318 EDP_ACTIVE_HOR_VER_HORIZ(mode->hdisplay) | msm_edp_ctrl_timing_cfg()
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/linux-4.4.14/drivers/gpu/drm/mgag200/ |
H A D | mgag200_mode.c | 887 int hdisplay, hsyncstart, hsyncend, htotal; mga_crtc_mode_set() local 1010 hdisplay = mode->hdisplay / 8 - 1; mga_crtc_mode_set() 1035 WREG_CRT(1, hdisplay); mga_crtc_mode_set() 1036 WREG_CRT(2, hdisplay); mga_crtc_mode_set() 1074 ((hdisplay & 0x100) >> 7) | mga_crtc_mode_set() 1575 active_area = mode->hdisplay * mode->vdisplay; mga_vga_calculate_mode_bandwidth() 1598 if (mode->hdisplay > 1600) mga_vga_mode_valid() 1606 if (mode->hdisplay > 1920) mga_vga_mode_valid() 1615 if (mode->hdisplay > 1280) mga_vga_mode_valid() 1636 if ((mode->hdisplay % 8) != 0 || (mode->hsync_start % 8) != 0 || mga_vga_mode_valid() 1654 if ((mode->hdisplay * mode->vdisplay * (bpp/8)) > mdev->mc.vram_size) { mga_vga_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/qxl/ |
H A D | qxl_display.c | 164 qdev->monitors_config_width = mode->hdisplay; qxl_add_monitors_config_modes() 557 mode->hdisplay, mode->vdisplay, qxl_crtc_mode_fixup() 558 adjusted_mode->hdisplay, qxl_crtc_mode_fixup() 630 mode->hdisplay, mode->vdisplay, qxl_crtc_mode_set() 631 adjusted_mode->hdisplay, qxl_crtc_mode_set() 676 mode->hdisplay, qxl_crtc_mode_set() 684 crtc->mode.hdisplay, crtc->mode.vdisplay, qxl_crtc_prepare() 785 head->width = mode->hdisplay; qxl_write_monitors_config_for_encoder() 849 if(qdev->monitors_config_width == mode->hdisplay && qxl_conn_mode_valid() 854 if (common_modes[i].w == mode->hdisplay && common_modes[i].h == mode->vdisplay) qxl_conn_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/vmwgfx/ |
H A D | vmwgfx_ldu.c | 90 w = max(w, crtc->x + crtc->mode.hdisplay); vmw_ldu_commit_list() 123 vmw_write(dev_priv, SVGA_REG_DISPLAY_WIDTH, crtc->mode.hdisplay); vmw_ldu_commit_list() 276 if (set->x + mode->hdisplay > fb->width || vmw_ldu_crtc_set_config()
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H A D | vmwgfx_scrn.c | 179 cmd->obj.size.width = mode->hdisplay; vmw_sou_fifo_create() 191 cmd->obj.backingStore.pitch = mode->hdisplay * 4; vmw_sou_fifo_create() 366 if (set->x + mode->hdisplay > fb->width || vmw_sou_crtc_set_config() 374 if (mode->hdisplay != crtc->mode.hdisplay || vmw_sou_crtc_set_config() 390 size_t size = mode->hdisplay * mode->vdisplay * 4; vmw_sou_crtc_set_config()
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H A D | vmwgfx_fb.c | 567 mode->hdisplay = var->xres; vmw_fb_set_par() 576 mode->hdisplay * vmw_fb_set_par() 682 info->var.xres = init_mode->hdisplay; vmw_fb_init()
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H A D | vmwgfx_stdu.c | 340 vmw_stdu_populate_update(cmd, stdu->base.unit, 0, crtc->mode.hdisplay, vmw_stdu_update_st() 491 if (set->x + mode->hdisplay > new_fb->width || vmw_stdu_crtc_set_config() 508 if (mode->hdisplay != new_fb->width || vmw_stdu_crtc_set_config() 516 display_base_size.width = mode->hdisplay; vmw_stdu_crtc_set_config()
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H A D | vmwgfx_kms.c | 1509 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay 1514 mode->hsync_start = mode->hdisplay + 50; vmw_guess_mode_timing() 1559 mode->hdisplay = du->pref_width; vmw_du_connector_fill_modes() 1564 mode->hdisplay * assumed_bpp, vmw_du_connector_fill_modes() 1582 if (bmode->hdisplay > max_width || vmw_du_connector_fill_modes() 1587 bmode->hdisplay * assumed_bpp, vmw_du_connector_fill_modes() 1744 s32 crtc_width = unit->crtc.mode.hdisplay; vmw_kms_helper_dirty()
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/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/ |
H A D | mdp5_encoder.c | 142 mode->hdisplay, mode->hsync_start, mdp5_encoder_mode_set() 184 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; mdp5_encoder_mode_set() 198 display_v_end -= mode->hsync_start - mode->hdisplay; mdp5_encoder_mode_set()
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H A D | mdp5_crtc.c | 312 mode->hdisplay, mode->hsync_start, mdp5_crtc_mode_set_nofb() 320 MDP5_LM_OUT_SIZE_WIDTH(mode->hdisplay) | mdp5_crtc_mode_set_nofb() 481 uint32_t xres = crtc->mode.hdisplay; get_roi()
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H A D | mdp5_cmd_encoder.c | 209 mode->hdisplay, mode->hsync_start, mdp5_cmd_encoder_mode_set()
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/linux-4.4.14/drivers/gpu/drm/udl/ |
H A D | udl_connector.c | 90 if (mode->vdisplay * mode->hdisplay > udl->sku_pixel_limit) udl_mode_valid()
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H A D | udl_modeset.c | 195 wrptr = udl_set_register_16(wrptr, 0x0F, mode->hdisplay); udl_set_vid_cmds() 335 wrptr = udl_set_base8bpp(wrptr, 2 * mode->vdisplay * mode->hdisplay); udl_crtc_mode_set()
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/linux-4.4.14/drivers/gpu/drm/i2c/ |
H A D | ch7006_mode.c | 112 .hdisplay = hd, \ 185 if (mode->mode.hdisplay != drm_mode->hdisplay || ch7006_lookup_mode() 352 hpos = round_fixed((norm->hvirtual * aspect - mode->hdisplay * scale) ch7006_setup_properties()
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H A D | tda998x_drv.c | 925 hs_pix_e = mode->hsync_end - mode->hdisplay; tda998x_encoder_mode_set() 926 hs_pix_s = mode->hsync_start - mode->hdisplay; tda998x_encoder_mode_set() 928 de_pix_s = mode->htotal - mode->hdisplay; tda998x_encoder_mode_set()
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/linux-4.4.14/drivers/gpu/drm/ast/ |
H A D | ast_mode.c | 800 if ((mode->hdisplay == 1680) && (mode->vdisplay == 1050)) ast_mode_valid() 802 if ((mode->hdisplay == 1280) && (mode->vdisplay == 800)) ast_mode_valid() 804 if ((mode->hdisplay == 1440) && (mode->vdisplay == 900)) ast_mode_valid() 806 if ((mode->hdisplay == 1360) && (mode->vdisplay == 768)) ast_mode_valid() 808 if ((mode->hdisplay == 1600) && (mode->vdisplay == 900)) ast_mode_valid() 812 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1080)) ast_mode_valid() 815 if ((mode->hdisplay == 1920) && (mode->vdisplay == 1200)) { ast_mode_valid() 824 switch (mode->hdisplay) { ast_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp4/ |
H A D | mdp4_dtv_encoder.c | 119 mode->hdisplay, mode->hsync_start, mdp4_dtv_encoder_mode_set() 139 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; mdp4_dtv_encoder_mode_set()
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H A D | mdp4_lcdc_encoder.c | 285 mode->hdisplay, mode->hsync_start, mdp4_lcdc_encoder_mode_set() 305 hsync_end_x = mode->htotal - (mode->hsync_start - mode->hdisplay) - 1; mdp4_lcdc_encoder_mode_set()
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H A D | mdp4_crtc.c | 262 mode->hdisplay, mode->hsync_start, mdp4_crtc_mode_set_nofb() 269 MDP4_DMA_SRC_SIZE_WIDTH(mode->hdisplay) | mdp4_crtc_mode_set_nofb() 281 MDP4_OVLP_SIZE_WIDTH(mode->hdisplay) | mdp4_crtc_mode_set_nofb()
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/linux-4.4.14/drivers/gpu/drm/tegra/ |
H A D | dsi.c | 559 hact = mode->hdisplay * mul / div; tegra_dsi_configure() 571 hfp = (mode->hsync_start - mode->hdisplay) * mul / div; tegra_dsi_configure() 594 bytes = 1 + (mode->hdisplay / 2) * mul / div; tegra_dsi_configure() 597 bytes = 1 + mode->hdisplay * mul / div; tegra_dsi_configure() 638 tegra_dsi_ganged_enable(dsi, 0, mode->hdisplay / 2); tegra_dsi_configure() 639 tegra_dsi_ganged_enable(dsi->slave, mode->hdisplay / 2, tegra_dsi_configure() 640 mode->hdisplay / 2); tegra_dsi_configure()
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H A D | sor.c | 595 params.num_clocks = div_u64(link_rate * mode->hdisplay, pclk); tegra_sor_calc_config() 630 num_syms_per_line = (mode->hdisplay * config->bits_per_pixel) * tegra_sor_calc_config() 645 num = ((mode->htotal - mode->hdisplay) - 7) * link_rate; tegra_sor_calc_config() 654 num = (mode->hdisplay - 25) * link_rate; tegra_sor_calc_config() 1154 hfp = mode->hsync_start - mode->hdisplay; 1176 if (mode->hdisplay < 16) 1547 hbe = hse + (mode->hsync_start - mode->hdisplay); tegra_sor_edp_enable() 1553 hbs = hbe + mode->hdisplay; tegra_sor_edp_enable() 1922 max_ac = ((mode->htotal - mode->hdisplay) - SOR_REKEY - 18) / 32; tegra_sor_hdmi_enable() 2111 hbs = hbe + mode->hdisplay; tegra_sor_hdmi_enable()
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H A D | hdmi.c | 852 h_front_porch = mode->hsync_start - mode->hdisplay; tegra_hdmi_encoder_enable() 899 if ((mode->hdisplay == 720) && ((mode->vdisplay == 480) || tegra_hdmi_encoder_enable()
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H A D | dc.c | 1085 ((mode->hsync_start - mode->hdisplay) << 0); tegra_dc_set_timings() 1088 value = (mode->vdisplay << 16) | mode->hdisplay; tegra_dc_set_timings()
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/linux-4.4.14/drivers/gpu/drm/shmobile/ |
H A D | shmob_drm_crtc.c | 108 value = ((mode->hdisplay / 8) << 16) /* HDCN */ shmob_drm_crtc_setup_geometry() 116 value = ((mode->hdisplay & 7) << 24) | ((mode->htotal & 7) << 16) shmob_drm_crtc_setup_geometry() 659 mode->hdisplay = sdev->pdata->panel.mode.hdisplay; shmob_drm_connector_get_modes()
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/linux-4.4.14/drivers/gpu/drm/vc4/ |
H A D | vc4_crtc.c | 210 VC4_SET_FIELD(mode->hsync_start - mode->hdisplay, vc4_crtc_mode_set_nofb() 212 VC4_SET_FIELD(mode->hdisplay, PV_HORZB_HACTIVE)); vc4_crtc_mode_set_nofb() 226 CRTC_WRITE(PV_HACT_ACT, mode->hdisplay); vc4_crtc_mode_set_nofb() 309 VC4_SET_FIELD(mode->hdisplay, SCALER_DISPCTRLX_WIDTH) | vc4_crtc_enable()
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H A D | vc4_hdmi.c | 315 VC4_SET_FIELD(mode->hdisplay, VC4_HDMI_HORZA_HAP)); vc4_hdmi_encoder_mode_set() 322 VC4_SET_FIELD(mode->hsync_start - mode->hdisplay, vc4_hdmi_encoder_mode_set()
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H A D | vc4_regs.h | 400 /* Horizontal active pixels (hdisplay). */ 411 /* Horizontal front porch (hsync_start - hdisplay). */
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/linux-4.4.14/drivers/gpu/drm/atmel-hlcdc/ |
H A D | atmel_hlcdc_plane.c | 597 if (state->crtc_x + state->crtc_w > mode->hdisplay) atmel_hlcdc_plane_atomic_check() 598 patched_crtc_w = mode->hdisplay - state->crtc_x; atmel_hlcdc_plane_atomic_check() 687 (mode->hdisplay != state->crtc_w || atmel_hlcdc_plane_atomic_check() 707 if (state->crtc_w + state->crtc_x > mode->hdisplay || atmel_hlcdc_plane_atomic_check()
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H A D | atmel_hlcdc_dc.c | 352 int hfront_porch = mode->hsync_start - mode->hdisplay; atmel_hlcdc_dc_mode_valid() 364 mode->hdisplay < 1) atmel_hlcdc_dc_mode_valid()
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/linux-4.4.14/drivers/gpu/drm/msm/hdmi/ |
H A D | hdmi_bridge.c | 156 hend = mode->htotal - mode->hsync_start + mode->hdisplay; hdmi_bridge_mode_set()
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/linux-4.4.14/drivers/gpu/drm/msm/dsi/ |
H A D | dsi_manager.c | 213 mode->hdisplay >>= 1; dsi_dual_connector_fix_modes() 254 connector->tile_h_size = mode->hdisplay; dsi_dual_connector_tile_init() 495 mode->hdisplay, mode->hsync_start, dsi_mgr_bridge_mode_set()
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H A D | dsi_host.c | 719 u32 ha_end = ha_start + mode->hdisplay; dsi_timing_setup() 746 wc = mode->hdisplay * dsi_get_bpp(msm_host->format) / 8 + 1; dsi_timing_setup() 756 DSI_CMD_MDP_STREAM_TOTAL_H_TOTAL(mode->hdisplay) | dsi_timing_setup() 1060 int bllp_len = msm_host->mode->hdisplay * dsi_cmds2buf_tx()
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/linux-4.4.14/drivers/gpu/drm/armada/ |
H A D | armada_crtc.c | 513 if ((adj->hdisplay == 1280 && adj->vdisplay == 720 && armada_drm_crtc_calculate_csc() 515 (adj->hdisplay == 1920 && adj->vdisplay == 1080)) { armada_drm_crtc_calculate_csc() 812 } else if (dcrtc->cursor_x + w > dcrtc->crtc.mode.hdisplay) { armada_drm_crtc_cursor_update() 815 w = max_t(int, dcrtc->crtc.mode.hdisplay - dcrtc->cursor_x, 0); armada_drm_crtc_cursor_update()
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H A D | armada_overlay.c | 115 .x2 = crtc->mode.hdisplay, armada_ovl_plane_update()
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/linux-4.4.14/drivers/gpu/drm/rockchip/ |
H A D | rockchip_drm_vop.c | 834 .x2 = crtc->mode.hdisplay, vop_update_plane_event() 1170 u16 hdisplay = adjusted_mode->hdisplay; vop_crtc_mode_set() local 1173 u16 hact_end = hact_st + hdisplay; vop_crtc_mode_set()
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/linux-4.4.14/drivers/gpu/drm/bridge/ |
H A D | dw_hdmi.c | 1063 hdmi_writeb(hdmi, mode->hdisplay >> 8, HDMI_FC_INHACTV1); hdmi_av_composer() 1064 hdmi_writeb(hdmi, mode->hdisplay, HDMI_FC_INHACTV0); hdmi_av_composer() 1071 hblank = mode->htotal - mode->hdisplay; hdmi_av_composer() 1079 h_de_hs = mode->hsync_start - mode->hdisplay; hdmi_av_composer()
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/linux-4.4.14/drivers/gpu/drm/cirrus/ |
H A D | cirrus_mode.c | 208 hdispend = mode->hdisplay / 8; cirrus_crtc_mode_set()
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/linux-4.4.14/include/uapi/drm/ |
H A D | drm_mode.h | 108 __u16 hdisplay; member in struct:drm_mode_modeinfo
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/linux-4.4.14/drivers/video/fbdev/ |
H A D | sm501fb.c | 308 /* hdisplay end and hsync start */ sm501fb_check_var()
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