Searched refs:gpt_base (Results 1 - 3 of 3) sorted by relevance

/linux-4.4.14/arch/arm/mach-spear/
H A Dtime.c66 static __iomem void *gpt_base; variable
78 writew(CTRL_PRESCALER256, gpt_base + CR(CLKSRC)); spear_clocksource_init()
84 writew(0xFFFF, gpt_base + LOAD(CLKSRC)); spear_clocksource_init()
86 val = readw(gpt_base + CR(CLKSRC)); spear_clocksource_init()
89 writew(val, gpt_base + CR(CLKSRC)); spear_clocksource_init()
92 clocksource_mmio_init(gpt_base + COUNT(CLKSRC), "tmr1", tick_rate, spear_clocksource_init()
98 u16 val = readw(gpt_base + CR(CLKEVT)); timer_shutdown()
102 writew(val, gpt_base + CR(CLKEVT)); timer_shutdown()
119 val = readw(gpt_base + CR(CLKEVT)); spear_set_oneshot()
121 writew(val, gpt_base + CR(CLKEVT)); spear_set_oneshot()
136 writew(period, gpt_base + LOAD(CLKEVT)); spear_set_periodic()
138 val = readw(gpt_base + CR(CLKEVT)); spear_set_periodic()
141 writew(val, gpt_base + CR(CLKEVT)); spear_set_periodic()
160 u16 val = readw(gpt_base + CR(CLKEVT)); clockevent_next_event()
163 writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT)); clockevent_next_event()
165 writew(cycles, gpt_base + LOAD(CLKEVT)); clockevent_next_event()
168 writew(val, gpt_base + CR(CLKEVT)); clockevent_next_event()
177 writew(INT_STATUS, gpt_base + IR(CLKEVT)); spear_timer_interrupt()
195 writew(CTRL_PRESCALER16, gpt_base + CR(CLKEVT)); spear_clockevent_init()
229 gpt_base = of_iomap(np, 0); spear_setup_of_timer()
230 if (!gpt_base) { spear_setup_of_timer()
255 iounmap(gpt_base); spear_setup_of_timer()
/linux-4.4.14/drivers/clocksource/
H A Dmtk_timer.c58 void __iomem *gpt_base; member in struct:mtk_clock_event_device
80 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_clkevt_time_stop()
81 writel(val & ~TIMER_CTRL_ENABLE, evt->gpt_base + mtk_clkevt_time_stop()
88 writel(delay, evt->gpt_base + TIMER_CMP_REG(timer)); mtk_clkevt_time_setup()
97 writel(GPT_IRQ_ACK(timer), evt->gpt_base + GPT_IRQ_ACK_REG); mtk_clkevt_time_start()
99 val = readl(evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_clkevt_time_start()
110 evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_clkevt_time_start()
146 writel(GPT_IRQ_ACK(GPT_CLK_EVT), evt->gpt_base + GPT_IRQ_ACK_REG); mtk_timer_interrupt()
156 evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_timer_setup()
159 evt->gpt_base + TIMER_CLK_REG(timer)); mtk_timer_setup()
161 writel(0x0, evt->gpt_base + TIMER_CMP_REG(timer)); mtk_timer_setup()
164 evt->gpt_base + TIMER_CTRL_REG(timer)); mtk_timer_setup()
172 writel(0x0, evt->gpt_base + GPT_IRQ_EN_REG); mtk_timer_enable_irq()
175 writel(0x3f, evt->gpt_base + GPT_IRQ_ACK_REG); mtk_timer_enable_irq()
177 val = readl(evt->gpt_base + GPT_IRQ_EN_REG); mtk_timer_enable_irq()
179 evt->gpt_base + GPT_IRQ_EN_REG); mtk_timer_enable_irq()
205 evt->gpt_base = of_io_request_and_map(node, 0, "mtk-timer"); mtk_timer_init()
206 if (IS_ERR(evt->gpt_base)) { mtk_timer_init()
239 clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), mtk_timer_init()
241 gpt_sched_reg = evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC); mtk_timer_init()
260 iounmap(evt->gpt_base); mtk_timer_init()
/linux-4.4.14/arch/arm/mach-mediatek/
H A Dmediatek.c29 void __iomem *gpt_base; mediatek_timer_init() local
35 gpt_base = ioremap(GPT6_CON_MT65xx, 0x04); mediatek_timer_init()
38 writel(GPT_ENABLE, gpt_base); mediatek_timer_init()
39 iounmap(gpt_base); mediatek_timer_init()

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