Searched refs:gpio_mmio_base (Results 1 – 3 of 3) sorted by relevance
243 bus->gpio_reg = dev_priv->gpio_mmio_base + in intel_gpio_setup()632 dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA; in intel_setup_gmbus()634 dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE; in intel_setup_gmbus()636 dev_priv->gpio_mmio_base = 0; in intel_setup_gmbus()
2147 #define GMBUS0 (dev_priv->gpio_mmio_base + 0x5100) /* clock/port select */2166 #define GMBUS1 (dev_priv->gpio_mmio_base + 0x5104) /* command/status */2180 #define GMBUS2 (dev_priv->gpio_mmio_base + 0x5108) /* status */2188 #define GMBUS3 (dev_priv->gpio_mmio_base + 0x510c) /* data buffer bytes 3-0 */2189 #define GMBUS4 (dev_priv->gpio_mmio_base + 0x5110) /* interrupt mask (Pineview+) */2195 #define GMBUS5 (dev_priv->gpio_mmio_base + 0x5120) /* byte index */
1733 uint32_t gpio_mmio_base; member