/linux-4.4.14/drivers/cpufreq/ |
D | s3c2440-cpufreq.c | 34 static struct clk *fclk; variable 58 unsigned long hclk, fclk, armclk; in s3c2440_cpufreq_calcdivs() local 61 fclk = cfg->freq.fclk; in s3c2440_cpufreq_calcdivs() 66 __func__, fclk, armclk, hclk_max); in s3c2440_cpufreq_calcdivs() 68 if (armclk > fclk) { in s3c2440_cpufreq_calcdivs() 70 armclk = fclk; in s3c2440_cpufreq_calcdivs() 74 if (armclk < fclk && armclk < hclk_max) in s3c2440_cpufreq_calcdivs() 81 hclk = (fclk / hdiv); in s3c2440_cpufreq_calcdivs() 111 if (armclk < fclk) { in s3c2440_cpufreq_calcdivs() 194 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2440_cpufreq_setdivs() [all …]
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D | s3c2412-cpufreq.c | 35 static struct clk *fclk; variable 44 unsigned long hclk, fclk, armclk, armdiv_clk; in s3c2412_cpufreq_calcdivs() local 47 fclk = cfg->freq.fclk; in s3c2412_cpufreq_calcdivs() 58 __func__, fclk, armclk, hclk_max); in s3c2412_cpufreq_calcdivs() 60 __func__, cfg->freq.fclk, cfg->freq.armclk, in s3c2412_cpufreq_calcdivs() 63 armdiv = fclk / armclk; in s3c2412_cpufreq_calcdivs() 71 armdiv_clk = fclk / armdiv; in s3c2412_cpufreq_calcdivs() 140 clk_set_parent(armclk, cfg->divs.dvs ? hclk : fclk); in s3c2412_cpufreq_setdivs() 170 .fclk = 200000000, 204 fclk = clk_get(NULL, "fclk"); in s3c2412_cpufreq_add() [all …]
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D | s3c2410-cpufreq.c | 48 unsigned long hclk, fclk, pclk; in s3c2410_cpufreq_calcdivs() local 52 fclk = cfg->freq.fclk; in s3c2410_cpufreq_calcdivs() 55 cfg->freq.armclk = fclk; in s3c2410_cpufreq_calcdivs() 58 __func__, fclk, hclk_max); in s3c2410_cpufreq_calcdivs() 60 hdiv = (fclk > cfg->max.hclk) ? 2 : 1; in s3c2410_cpufreq_calcdivs() 61 hclk = fclk / hdiv; in s3c2410_cpufreq_calcdivs() 87 .fclk = 200000000, 140 s3c2410_cpufreq_info.max.fclk = 266000000; in s3c2410a_cpufreq_add()
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D | s3c24xx-cpufreq.c | 65 unsigned long fclk, pclk, hclk, armclk; in s3c_cpufreq_getcur() local 67 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); in s3c_cpufreq_getcur() 73 cfg->pll.frequency = fclk; in s3c_cpufreq_getcur() 77 cfg->divs.h_divisor = fclk / hclk; in s3c_cpufreq_getcur() 78 cfg->divs.p_divisor = fclk / pclk; in s3c_cpufreq_getcur() 85 cfg->freq.fclk = pll; in s3c_cpufreq_calc() 105 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk, in s3c_cpufreq_show() 175 cpu_new.freq.fclk = cpu_new.pll.frequency; in s3c_cpufreq_settarget() 210 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk); in s3c_cpufreq_settarget() 229 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) { in s3c_cpufreq_settarget() [all …]
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D | s3c24xx-cpufreq-debugfs.c | 34 f->fclk, f->hclk, f->pclk, f->armclk); in show_max() 87 seq_printf(seq, " FCLK %ld Hz\n", cfg->freq.fclk); in info_show()
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/linux-4.4.14/arch/h8300/boot/dts/ |
D | edosk2674.dts | 37 fclk: fclk { label 74 clocks = <&fclk>; 82 clocks = <&fclk>; 90 clocks = <&fclk>; 97 clocks = <&fclk>; 104 clocks = <&fclk>;
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D | h8300h_sim.dts | 30 fclk: fclk { label 68 clocks = <&fclk>; 77 clocks = <&fclk>; 85 clocks = <&fclk>; 93 clocks = <&fclk>;
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D | h8s_sim.dts | 36 fclk: fclk { label 73 clocks = <&fclk>; 81 clocks = <&fclk>; 89 clocks = <&fclk>; 96 clocks = <&fclk>;
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/linux-4.4.14/drivers/usb/host/ |
D | ehci-sh.c | 17 struct clk *iclk, *fclk; member 125 priv->fclk = devm_clk_get(&pdev->dev, "usb_fck"); in ehci_hcd_sh_probe() 126 if (IS_ERR(priv->fclk)) in ehci_hcd_sh_probe() 127 priv->fclk = NULL; in ehci_hcd_sh_probe() 133 clk_enable(priv->fclk); in ehci_hcd_sh_probe() 153 clk_disable(priv->fclk); in ehci_hcd_sh_probe() 171 clk_disable(priv->fclk); in ehci_hcd_sh_remove()
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D | ohci-at91.c | 52 struct clk *fclk; member 78 clk_set_rate(ohci_at91->fclk, 48000000); in at91_start_clock() 81 clk_prepare_enable(ohci_at91->fclk); in at91_start_clock() 90 clk_disable_unprepare(ohci_at91->fclk); in at91_stop_clock() 189 ohci_at91->fclk = devm_clk_get(dev, "uhpck"); in usb_hcd_at91_probe() 190 if (IS_ERR(ohci_at91->fclk)) { in usb_hcd_at91_probe() 192 retval = PTR_ERR(ohci_at91->fclk); in usb_hcd_at91_probe()
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/linux-4.4.14/Documentation/devicetree/bindings/display/ti/ |
D | ti,omap3-dss.txt | 14 - clocks: handle to fclk 37 - clocks: handle to fclk 48 - clocks: handles to fclk and iclk 60 - clocks: handle to fclk 78 - clocks: handles to fclk and pll clock
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D | ti,omap4-dss.txt | 14 - clocks: handle to fclk 36 - clocks: handle to fclk 47 - clocks: handles to fclk and iclk 63 - clocks: handle to fclk 84 - clocks: handles to fclk and pll clock 107 - clocks: handles to fclk and pll clock
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D | ti,omap5-dss.txt | 14 - clocks: handle to fclk 36 - clocks: handle to fclk 47 - clocks: handles to fclk and iclk 65 - clocks: handles to fclk and pll clock 88 - clocks: handles to fclk and pll clock
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D | ti,dra7-dss.txt | 14 - clocks: handle to fclk 47 - clocks: handle to fclk 61 - clocks: handles to fclk and pll clock
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/linux-4.4.14/drivers/media/dvb-frontends/ |
D | s5h1420.c | 53 u32 fclk; member 382 tmp = state->fclk / tmp; in s5h1420_read_status() 489 do_div(val, (state->fclk / 1000)); in s5h1420_setsymbolrate() 516 val = -(int) ((freqoffset * (1<<24)) / (state->fclk / 1000000)); in s5h1420_setfreqoffset() 544 val = (((-val) * (state->fclk/1000000)) / (1<<24)); in s5h1420_getfreqoffset() 682 state->fclk = 80000000; in s5h1420_set_frontend() 684 state->fclk = 59000000; in s5h1420_set_frontend() 686 state->fclk = 86000000; in s5h1420_set_frontend() 688 state->fclk = 88000000; in s5h1420_set_frontend() 690 state->fclk = 44000000; in s5h1420_set_frontend() [all …]
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D | cx24110.c | 244 u32 tmp, fclk, BDRI; in cx24110_set_symbolrate() local 264 fclk=90999000UL/2; in cx24110_set_symbolrate() 268 fclk=60666000UL; in cx24110_set_symbolrate() 272 fclk=80888000UL; in cx24110_set_symbolrate() 276 fclk=90999000UL; in cx24110_set_symbolrate() 278 dprintk("cx24110 debug: fclk %d Hz\n",fclk); in cx24110_set_symbolrate() 288 BDRI=fclk>>2; in cx24110_set_symbolrate() 301 dprintk("fclk = %d\n", fclk); in cx24110_set_symbolrate()
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D | mb86a20s.h | 32 u32 fclk; member
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D | mb86a20s.c | 1767 u32 fclk; in mb86a20s_initfe() local 1802 fclk = state->config->fclk; in mb86a20s_initfe() 1803 if (!fclk) in mb86a20s_initfe() 1804 fclk = 32571428; in mb86a20s_initfe() 1814 do_div(pll, 63 * fclk); in mb86a20s_initfe() 1829 __func__, fclk, state->if_freq, (long long)pll); in mb86a20s_initfe()
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/linux-4.4.14/arch/sh/drivers/pci/ |
D | pcie-sh7786.c | 27 struct clk *fclk, phy_clk; member 223 port->fclk = clk_get(NULL, fclk_name); in pcie_clk_init() 224 if (IS_ERR(port->fclk)) { in pcie_clk_init() 225 ret = PTR_ERR(port->fclk); in pcie_clk_init() 229 clk_enable(port->fclk); in pcie_clk_init() 249 clk_disable(port->fclk); in pcie_clk_init() 250 clk_put(port->fclk); in pcie_clk_init()
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/linux-4.4.14/arch/arm/plat-omap/ |
D | dmtimer.c | 149 timer->fclk = clk_get(&timer->pdev->dev, "fck"); in omap_dm_timer_prepare() 150 if (WARN_ON_ONCE(IS_ERR(timer->fclk))) { in omap_dm_timer_prepare() 326 clk_put(timer->fclk); in omap_dm_timer_free() 408 if (timer && !IS_ERR(timer->fclk)) in omap_dm_timer_get_fclk() 409 return timer->fclk; in omap_dm_timer_get_fclk() 465 rate = clk_get_rate(timer->fclk); in omap_dm_timer_stop() 504 if (IS_ERR(timer->fclk)) in omap_dm_timer_set_source() 527 ret = clk_set_parent(timer->fclk, parent); in omap_dm_timer_set_source() 830 timer->fclk = ERR_PTR(-ENODEV); in omap_dm_timer_probe()
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/linux-4.4.14/sound/soc/omap/ |
D | omap-dmic.c | 50 struct clk *fclk; member 336 ret = clk_set_parent(dmic->fclk, parent_clk); in omap_dmic_select_fclk() 339 ret = clk_set_parent(dmic->fclk, parent_clk); in omap_dmic_select_fclk() 469 dmic->fclk = devm_clk_get(dmic->dev, "fck"); in asoc_dmic_probe() 470 if (IS_ERR(dmic->fclk)) { in asoc_dmic_probe()
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D | mcbsp.c | 748 r = clk_set_parent(mcbsp->fclk, fck_src); in omap2_mcbsp_set_clks_src() 1031 mcbsp->fclk = clk_get(&pdev->dev, "fck"); in omap_mcbsp_init() 1032 if (IS_ERR(mcbsp->fclk)) { in omap_mcbsp_init() 1033 ret = PTR_ERR(mcbsp->fclk); in omap_mcbsp_init() 1079 clk_put(mcbsp->fclk); in omap_mcbsp_init()
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D | mcbsp.h | 293 struct clk *fclk; member
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D | omap-mcbsp.c | 837 clk_put(mcbsp->fclk); in asoc_mcbsp_remove()
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/linux-4.4.14/arch/arm/mach-omap2/ |
D | timer.c | 293 timer->fclk = clk_get(NULL, omap_hwmod_get_main_clk(oh)); in omap_dm_timer_init_one() 294 if (IS_ERR(timer->fclk)) in omap_dm_timer_init_one() 295 return PTR_ERR(timer->fclk); in omap_dm_timer_init_one() 301 WARN(clk_set_parent(timer->fclk, src) < 0, in omap_dm_timer_init_one() 317 timer->rate = clk_get_rate(timer->fclk); in omap_dm_timer_init_one()
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D | prm3xxx.c | 232 u32 wkst, fclk, iclk, clken; in omap3xxx_prm_clear_mod_irqs() local 245 fclk = omap2_cm_read_mod_reg(module, fclk_off); in omap3xxx_prm_clear_mod_irqs() 262 omap2_cm_write_mod_reg(fclk, module, fclk_off); in omap3xxx_prm_clear_mod_irqs()
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/linux-4.4.14/drivers/spi/ |
D | spi-ti-qspi.c | 49 struct clk *fclk; member 142 clk_rate = clk_get_rate(qspi->fclk); in ti_qspi_setup() 542 qspi->fclk = devm_clk_get(&pdev->dev, "fck"); in ti_qspi_probe() 543 if (IS_ERR(qspi->fclk)) { in ti_qspi_probe() 544 ret = PTR_ERR(qspi->fclk); in ti_qspi_probe()
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/linux-4.4.14/drivers/net/hamradio/ |
D | baycom_epp.c | 182 unsigned int fclk; member 317 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, in eppconfig() 318 (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps), in eppconfig() 985 bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0); in baycom_setmode() 986 if (bc->cfg.fclk < 1000000) in baycom_setmode() 987 bc->cfg.fclk = 1000000; in baycom_setmode() 988 if (bc->cfg.fclk > 25000000) in baycom_setmode() 989 bc->cfg.fclk = 25000000; in baycom_setmode() 1083 bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps, in baycom_ioctl() 1191 bc->cfg.fclk = 19666600; in baycom_epp_dev_setup()
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/linux-4.4.14/Documentation/devicetree/bindings/mmc/ |
D | ti-omap-hsmmc.txt | 70 swakeup | | fclk 76 In suspend the fclk is off and the module is disfunctional. Even register reads 77 will fail. A small logic in the host will request fclk restore, when an
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/linux-4.4.14/arch/arm/plat-samsung/include/plat/ |
D | cpu-freq.h | 36 unsigned long fclk; member
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/linux-4.4.14/drivers/clk/zynq/ |
D | clkc.c | 113 static void __init zynq_clk_register_fclk(enum zynq_clk fclk, in zynq_clk_register_fclk() argument 158 clks[fclk] = clk_register_gate(NULL, clk_name, in zynq_clk_register_fclk() 163 if (clk_prepare_enable(clks[fclk])) in zynq_clk_register_fclk() 165 fclk - fclk0); in zynq_clk_register_fclk() 182 clks[fclk] = ERR_PTR(-ENOMEM); in zynq_clk_register_fclk()
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/linux-4.4.14/Documentation/devicetree/bindings/timer/ |
D | renesas,8bit-timer.txt | 22 clocks = <&fclk>;
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/linux-4.4.14/drivers/i2c/busses/ |
D | i2c-omap.c | 363 struct clk *fclk; in omap_i2c_init() local 381 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init() 382 fclk_rate = clk_get_rate(fclk); in omap_i2c_init() 383 clk_put(fclk); in omap_i2c_init() 413 fclk = clk_get(omap->dev, "fck"); in omap_i2c_init() 414 fclk_rate = clk_get_rate(fclk) / 1000; in omap_i2c_init() 415 clk_put(fclk); in omap_i2c_init()
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/linux-4.4.14/drivers/mmc/host/ |
D | omap.c | 129 struct clk * fclk; member 193 clk_enable(host->fclk); in mmc_omap_fclk_enable() 195 clk_disable(host->fclk); in mmc_omap_fclk_enable() 1130 int func_clk_rate = clk_get_rate(host->fclk); in mmc_omap_calc_divisor() 1379 host->fclk = clk_get(&pdev->dev, "fck"); in mmc_omap_probe() 1380 if (IS_ERR(host->fclk)) { in mmc_omap_probe() 1381 ret = PTR_ERR(host->fclk); in mmc_omap_probe() 1452 clk_put(host->fclk); in mmc_omap_probe() 1474 clk_put(host->fclk); in mmc_omap_remove()
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D | omap_hsmmc.c | 182 struct clk *fclk; member 621 dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); in calc_divisor() 668 if (clkdiv && (clk_get_rate(host->fclk)/clkdiv) > 25000000) in omap_hsmmc_set_clock() 1626 host->clk_rate = clk_get_rate(host->fclk); in omap_hsmmc_request() 2082 host->fclk = devm_clk_get(&pdev->dev, "fck"); in omap_hsmmc_probe() 2083 if (IS_ERR(host->fclk)) { in omap_hsmmc_probe() 2084 ret = PTR_ERR(host->fclk); in omap_hsmmc_probe() 2085 host->fclk = NULL; in omap_hsmmc_probe()
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/linux-4.4.14/drivers/clk/samsung/ |
D | clk-exynos4.c | 1234 struct samsung_fixed_rate_clock fclk; in exynos4_clk_register_finpll() local 1250 fclk.id = CLK_FIN_PLL; in exynos4_clk_register_finpll() 1251 fclk.name = "fin_pll"; in exynos4_clk_register_finpll() 1252 fclk.parent_name = NULL; in exynos4_clk_register_finpll() 1253 fclk.flags = CLK_IS_ROOT; in exynos4_clk_register_finpll() 1254 fclk.fixed_rate = finpll_f; in exynos4_clk_register_finpll() 1255 samsung_clk_register_fixed_rate(ctx, &fclk, 1); in exynos4_clk_register_finpll()
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/linux-4.4.14/drivers/usb/gadget/udc/ |
D | at91_udc.c | 920 clk_enable(udc->fclk); in clk_on() 929 clk_disable(udc->fclk); in clk_off() 1880 udc->fclk = devm_clk_get(dev, "hclk"); in at91udc_probe() 1881 if (IS_ERR(udc->fclk)) in at91udc_probe() 1882 return PTR_ERR(udc->fclk); in at91udc_probe() 1885 clk_set_rate(udc->fclk, 48000000); in at91udc_probe() 1886 retval = clk_prepare(udc->fclk); in at91udc_probe() 1959 clk_unprepare(udc->fclk); in at91udc_probe() 1983 clk_unprepare(udc->fclk); in at91udc_remove()
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D | at91_udc.h | 142 struct clk *iclk, *fclk; member
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/linux-4.4.14/arch/arm/boot/dts/ |
D | zynq-parallella.dts | 43 fclk-enable = <0xf>;
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D | zynq-7000.dtsi | 247 fclk-enable = <0>;
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/linux-4.4.14/Documentation/devicetree/bindings/clock/ |
D | zynq-7000.txt | 26 - fclk-enable : Bit mask to enable FCLKs statically at boot time.
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/linux-4.4.14/drivers/tty/serial/ |
D | sh-sci.c | 97 struct clk *fclk; member 459 clk_prepare_enable(sci_port->fclk); in sci_port_enable() 475 clk_disable_unprepare(sci_port->fclk); in sci_port_disable() 2323 sci_port->fclk = clk_get(&dev->dev, "sci_fck"); in sci_init_single() 2324 if (IS_ERR(sci_port->fclk)) in sci_init_single() 2325 sci_port->fclk = NULL; in sci_init_single() 2383 clk_put(port->fclk); in sci_cleanup_single()
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/linux-4.4.14/arch/arm/plat-omap/include/plat/ |
D | dmtimer.h | 105 struct clk *fclk; member
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