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Searched refs:fb_swap (Results 1 – 4 of 4) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
Datombios_crtc.c1149 u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE); in dce4_crtc_do_set_base() local
1201 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1209 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1217 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1224 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN16); in dce4_crtc_do_set_base()
1232 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1240 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1250 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32); in dce4_crtc_do_set_base()
1384 WREG32(EVERGREEN_GRPH_SWAP_CONTROL + radeon_crtc->crtc_offset, fb_swap); in dce4_crtc_do_set_base()
1465 u32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE; in avivo_crtc_do_set_base() local
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/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Ddce_v11_0.c2040 u32 fb_swap = REG_SET_FIELD(0, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, ENDIAN_NONE); in dce_v11_0_crtc_do_set_base() local
2095 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2104 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2113 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2121 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2130 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2139 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2150 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v11_0_crtc_do_set_base()
2201 WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc->crtc_offset, fb_swap); in dce_v11_0_crtc_do_set_base()
Ddce_v10_0.c2052 u32 fb_swap = REG_SET_FIELD(0, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, ENDIAN_NONE); in dce_v10_0_crtc_do_set_base() local
2107 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2116 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2125 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2133 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2142 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2151 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2162 fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP, in dce_v10_0_crtc_do_set_base()
2213 WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc->crtc_offset, fb_swap); in dce_v10_0_crtc_do_set_base()
Ddce_v8_0.c1989 u32 fb_swap = (GRPH_ENDIAN_NONE << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base() local
2044 fb_swap = (GRPH_ENDIAN_8IN16 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2052 fb_swap = (GRPH_ENDIAN_8IN16 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2060 fb_swap = (GRPH_ENDIAN_8IN16 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2067 fb_swap = (GRPH_ENDIAN_8IN16 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2075 fb_swap = (GRPH_ENDIAN_8IN32 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2083 fb_swap = (GRPH_ENDIAN_8IN32 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2093 fb_swap = (GRPH_ENDIAN_8IN32 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT); in dce_v8_0_crtc_do_set_base()
2137 WREG32(mmGRPH_SWAP_CNTL + amdgpu_crtc->crtc_offset, fb_swap); in dce_v8_0_crtc_do_set_base()