Searched refs:dwIoBase (Results 1 - 10 of 10) sorted by relevance

/linux-4.4.14/drivers/staging/vt6655/
H A Dmac.h557 #define MACvRegBitsOn(dwIoBase, byRegOfs, byBits) \
560 VNSvInPortB(dwIoBase + byRegOfs, &byData); \
561 VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits)); \
564 #define MACvWordRegBitsOn(dwIoBase, byRegOfs, wBits) \
567 VNSvInPortW(dwIoBase + byRegOfs, &wData); \
568 VNSvOutPortW(dwIoBase + byRegOfs, wData | (wBits)); \
571 #define MACvDWordRegBitsOn(dwIoBase, byRegOfs, dwBits) \
574 VNSvInPortD(dwIoBase + byRegOfs, &dwData); \
575 VNSvOutPortD(dwIoBase + byRegOfs, dwData | (dwBits)); \
578 #define MACvRegBitsOnEx(dwIoBase, byRegOfs, byMask, byBits) \
581 VNSvInPortB(dwIoBase + byRegOfs, &byData); \
583 VNSvOutPortB(dwIoBase + byRegOfs, byData | (byBits)); \
586 #define MACvRegBitsOff(dwIoBase, byRegOfs, byBits) \
589 VNSvInPortB(dwIoBase + byRegOfs, &byData); \
590 VNSvOutPortB(dwIoBase + byRegOfs, byData & ~(byBits)); \
593 #define MACvWordRegBitsOff(dwIoBase, byRegOfs, wBits) \
596 VNSvInPortW(dwIoBase + byRegOfs, &wData); \
597 VNSvOutPortW(dwIoBase + byRegOfs, wData & ~(wBits)); \
600 #define MACvDWordRegBitsOff(dwIoBase, byRegOfs, dwBits) \
603 VNSvInPortD(dwIoBase + byRegOfs, &dwData); \
604 VNSvOutPortD(dwIoBase + byRegOfs, dwData & ~(dwBits)); \
607 #define MACvGetCurrRx0DescAddr(dwIoBase, pdwCurrDescAddr) \
608 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR0, \
611 #define MACvGetCurrRx1DescAddr(dwIoBase, pdwCurrDescAddr) \
612 VNSvInPortD(dwIoBase + MAC_REG_RXDMAPTR1, \
615 #define MACvGetCurrTx0DescAddr(dwIoBase, pdwCurrDescAddr) \
616 VNSvInPortD(dwIoBase + MAC_REG_TXDMAPTR0, \
619 #define MACvGetCurrAC0DescAddr(dwIoBase, pdwCurrDescAddr) \
620 VNSvInPortD(dwIoBase + MAC_REG_AC0DMAPTR, \
623 #define MACvGetCurrSyncDescAddr(dwIoBase, pdwCurrDescAddr) \
624 VNSvInPortD(dwIoBase + MAC_REG_SYNCDMAPTR, \
627 #define MACvGetCurrATIMDescAddr(dwIoBase, pdwCurrDescAddr) \
628 VNSvInPortD(dwIoBase + MAC_REG_ATIMDMAPTR, \
632 #define MACvSetCurrBCNTxDescAddr(dwIoBase, dwCurrDescAddr) \
633 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, \
637 #define MACvSetCurrBCNLength(dwIoBase, wCurrBCNLength) \
638 VNSvOutPortW(dwIoBase + MAC_REG_BCNDMACTL+2, \
641 #define MACvReadBSSIDAddress(dwIoBase, pbyEtherAddr) \
643 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
644 VNSvInPortB(dwIoBase + MAC_REG_BSSID0, \
646 VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 1, \
648 VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 2, \
650 VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 3, \
652 VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 4, \
654 VNSvInPortB(dwIoBase + MAC_REG_BSSID0 + 5, \
656 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
659 #define MACvWriteBSSIDAddress(dwIoBase, pbyEtherAddr) \
661 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
662 VNSvOutPortB(dwIoBase + MAC_REG_BSSID0, \
664 VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 1, \
666 VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 2, \
668 VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 3, \
670 VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 4, \
672 VNSvOutPortB(dwIoBase + MAC_REG_BSSID0 + 5, \
674 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
677 #define MACvReadEtherAddress(dwIoBase, pbyEtherAddr) \
679 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
680 VNSvInPortB(dwIoBase + MAC_REG_PAR0, \
682 VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 1, \
684 VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 2, \
686 VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 3, \
688 VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 4, \
690 VNSvInPortB(dwIoBase + MAC_REG_PAR0 + 5, \
692 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
695 #define MACvWriteEtherAddress(dwIoBase, pbyEtherAddr) \
697 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
698 VNSvOutPortB(dwIoBase + MAC_REG_PAR0, \
700 VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 1, \
702 VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 2, \
704 VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 3, \
706 VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 4, \
708 VNSvOutPortB(dwIoBase + MAC_REG_PAR0 + 5, \
710 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
713 #define MACvClearISR(dwIoBase) \
714 VNSvOutPortD(dwIoBase + MAC_REG_ISR, IMR_MASK_VALUE)
716 #define MACvStart(dwIoBase) \
717 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, \
720 #define MACvRx0PerPktMode(dwIoBase) \
721 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKT)
723 #define MACvRx0BufferFillMode(dwIoBase) \
724 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, RX_PERPKTCLR)
726 #define MACvRx1PerPktMode(dwIoBase) \
727 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKT)
729 #define MACvRx1BufferFillMode(dwIoBase) \
730 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, RX_PERPKTCLR)
732 #define MACvRxOn(dwIoBase) \
733 MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON)
735 #define MACvReceive0(dwIoBase) \
738 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData); \
740 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_WAKE); \
742 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); \
745 #define MACvReceive1(dwIoBase) \
748 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData); \
750 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_WAKE); \
752 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); \
755 #define MACvTxOn(dwIoBase) \
756 MACvRegBitsOn(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON)
758 #define MACvTransmit0(dwIoBase) \
761 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData); \
763 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_WAKE); \
765 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); \
768 #define MACvTransmitAC0(dwIoBase) \
771 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData); \
773 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_WAKE); \
775 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); \
778 #define MACvTransmitSYNC(dwIoBase) \
781 VNSvInPortD(dwIoBase + MAC_REG_SYNCDMACTL, &dwData); \
783 VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_WAKE); \
785 VNSvOutPortD(dwIoBase + MAC_REG_SYNCDMACTL, DMACTL_RUN); \
788 #define MACvTransmitATIM(dwIoBase) \
791 VNSvInPortD(dwIoBase + MAC_REG_ATIMDMACTL, &dwData); \
793 VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_WAKE); \
795 VNSvOutPortD(dwIoBase + MAC_REG_ATIMDMACTL, DMACTL_RUN); \
798 #define MACvTransmitBCN(dwIoBase) \
799 VNSvOutPortB(dwIoBase + MAC_REG_BCNDMACTL, BEACON_READY)
801 #define MACvClearStckDS(dwIoBase) \
804 VNSvInPortB(dwIoBase + MAC_REG_STICKHW, &byOrgValue); \
806 VNSvOutPortB(dwIoBase + MAC_REG_STICKHW, byOrgValue); \
809 #define MACvReadISR(dwIoBase, pdwValue) \
810 VNSvInPortD(dwIoBase + MAC_REG_ISR, pdwValue)
812 #define MACvWriteISR(dwIoBase, dwValue) \
813 VNSvOutPortD(dwIoBase + MAC_REG_ISR, dwValue)
815 #define MACvIntEnable(dwIoBase, dwMask) \
816 VNSvOutPortD(dwIoBase + MAC_REG_IMR, dwMask)
818 #define MACvIntDisable(dwIoBase) \
819 VNSvOutPortD(dwIoBase + MAC_REG_IMR, 0)
821 #define MACvSelectPage0(dwIoBase) \
822 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0)
824 #define MACvSelectPage1(dwIoBase) \
825 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1)
827 #define MACvReadMIBCounter(dwIoBase, pdwCounter) \
828 VNSvInPortD(dwIoBase + MAC_REG_MIBCNTR, pdwCounter)
830 #define MACvPwrEvntDisable(dwIoBase) \
831 VNSvOutPortW(dwIoBase + MAC_REG_WAKEUPEN0, 0x0000)
833 #define MACvEnableProtectMD(dwIoBase) \
836 VNSvInPortD(dwIoBase + MAC_REG_ENCFG, &dwOrgValue); \
838 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
841 #define MACvDisableProtectMD(dwIoBase) \
844 VNSvInPortD(dwIoBase + MAC_REG_ENCFG, &dwOrgValue); \
846 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
849 #define MACvEnableBarkerPreambleMd(dwIoBase) \
852 VNSvInPortD(dwIoBase + MAC_REG_ENCFG, &dwOrgValue); \
854 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
857 #define MACvDisableBarkerPreambleMd(dwIoBase) \
860 VNSvInPortD(dwIoBase + MAC_REG_ENCFG, &dwOrgValue); \
862 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
865 #define MACvSetBBType(dwIoBase, byTyp) \
868 VNSvInPortD(dwIoBase + MAC_REG_ENCFG, &dwOrgValue); \
871 VNSvOutPortD(dwIoBase + MAC_REG_ENCFG, dwOrgValue); \
874 #define MACvReadATIMW(dwIoBase, pwCounter) \
875 VNSvInPortW(dwIoBase + MAC_REG_AIDATIM, pwCounter)
877 #define MACvWriteATIMW(dwIoBase, wCounter) \
878 VNSvOutPortW(dwIoBase + MAC_REG_AIDATIM, wCounter)
880 #define MACvWriteCRC16_128(dwIoBase, byRegOfs, wCRC) \
882 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 1); \
883 VNSvOutPortW(dwIoBase + byRegOfs, wCRC); \
884 VNSvOutPortB(dwIoBase + MAC_REG_PAGE1SEL, 0); \
887 #define MACvGPIOIn(dwIoBase, pbyValue) \
888 VNSvInPortB(dwIoBase + MAC_REG_GPIOCTL1, pbyValue)
890 #define MACvSetRFLE_LatchBase(dwIoBase) \
891 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_RFLEOPT)
893 bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs,
895 bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs,
898 bool MACbIsIntDisable(void __iomem *dwIoBase);
900 void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit);
902 void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit);
903 void MACvGetLongRetryLimit(void __iomem *dwIoBase,
906 void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode);
908 void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf);
909 void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf);
911 bool MACbSoftwareReset(void __iomem *dwIoBase);
912 bool MACbSafeSoftwareReset(void __iomem *dwIoBase);
913 bool MACbSafeRxOff(void __iomem *dwIoBase);
914 bool MACbSafeTxOff(void __iomem *dwIoBase);
915 bool MACbSafeStop(void __iomem *dwIoBase);
916 bool MACbShutdown(void __iomem *dwIoBase);
917 void MACvInitialize(void __iomem *dwIoBase);
918 void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase,
920 void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase,
922 void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase,
924 void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase,
926 void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase,
928 void MACvSetCurrSyncDescAddrEx(void __iomem *dwIoBase,
930 void MACvSetCurrATIMDescAddrEx(void __iomem *dwIoBase,
932 void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay);
933 void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime);
935 void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset,
938 bool MACbPSWakeup(void __iomem *dwIoBase);
940 void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl,
944 void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx);
H A Dmac.c64 * dwIoBase - Base Address for MAC
73 bool MACbIsRegBitsOn(void __iomem *dwIoBase, unsigned char byRegOfs, MACbIsRegBitsOn() argument
78 VNSvInPortB(dwIoBase + byRegOfs, &byData); MACbIsRegBitsOn()
88 * dwIoBase - Base Address for MAC
97 bool MACbIsRegBitsOff(void __iomem *dwIoBase, unsigned char byRegOfs, MACbIsRegBitsOff() argument
102 VNSvInPortB(dwIoBase + byRegOfs, &byData); MACbIsRegBitsOff()
112 * dwIoBase - Base Address for MAC
119 bool MACbIsIntDisable(void __iomem *dwIoBase) MACbIsIntDisable() argument
123 VNSvInPortD(dwIoBase + MAC_REG_IMR, &dwData); MACbIsIntDisable()
136 * dwIoBase - Base Address for MAC
144 void MACvSetShortRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit) MACvSetShortRetryLimit() argument
147 VNSvOutPortB(dwIoBase + MAC_REG_SRT, byRetryLimit); MACvSetShortRetryLimit()
157 * dwIoBase - Base Address for MAC
165 void MACvSetLongRetryLimit(void __iomem *dwIoBase, unsigned char byRetryLimit) MACvSetLongRetryLimit() argument
168 VNSvOutPortB(dwIoBase + MAC_REG_LRT, byRetryLimit); MACvSetLongRetryLimit()
177 * dwIoBase - Base Address for MAC
185 void MACvSetLoopbackMode(void __iomem *dwIoBase, unsigned char byLoopbackMode) MACvSetLoopbackMode() argument
191 VNSvInPortB(dwIoBase + MAC_REG_TEST, &byOrgValue); MACvSetLoopbackMode()
194 VNSvOutPortB(dwIoBase + MAC_REG_TEST, byOrgValue); MACvSetLoopbackMode()
203 * dwIoBase - Base Address for MAC
210 void MACvSaveContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf) MACvSaveContext() argument
216 VNSvInPortB((dwIoBase + ii), (pbyCxtBuf + ii)); MACvSaveContext()
218 MACvSelectPage1(dwIoBase); MACvSaveContext()
222 VNSvInPortB((dwIoBase + ii), MACvSaveContext()
225 MACvSelectPage0(dwIoBase); MACvSaveContext()
234 * dwIoBase - Base Address for MAC
242 void MACvRestoreContext(void __iomem *dwIoBase, unsigned char *pbyCxtBuf) MACvRestoreContext() argument
246 MACvSelectPage1(dwIoBase); MACvRestoreContext()
249 VNSvOutPortB((dwIoBase + ii), MACvRestoreContext()
252 MACvSelectPage0(dwIoBase); MACvRestoreContext()
256 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); MACvRestoreContext()
260 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); MACvRestoreContext()
262 VNSvOutPortB(dwIoBase + MAC_REG_CFG, *(pbyCxtBuf + MAC_REG_CFG)); MACvRestoreContext()
266 VNSvOutPortB(dwIoBase + ii, *(pbyCxtBuf + ii)); MACvRestoreContext()
269 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, MACvRestoreContext()
271 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, MACvRestoreContext()
273 VNSvOutPortD(dwIoBase + MAC_REG_BCNDMAPTR, MACvRestoreContext()
276 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, MACvRestoreContext()
279 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, MACvRestoreContext()
289 * dwIoBase - Base Address for MAC
296 bool MACbSoftwareReset(void __iomem *dwIoBase) MACbSoftwareReset() argument
302 VNSvOutPortB(dwIoBase + MAC_REG_HOSTCR, 0x01); MACbSoftwareReset()
305 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); MACbSoftwareReset()
320 * dwIoBase - Base Address for MAC
327 bool MACbSafeSoftwareReset(void __iomem *dwIoBase) MACbSafeSoftwareReset() argument
337 MACvSaveContext(dwIoBase, abyTmpRegData); MACbSafeSoftwareReset()
339 bRetVal = MACbSoftwareReset(dwIoBase); MACbSafeSoftwareReset()
341 MACvRestoreContext(dwIoBase, abyTmpRegData); MACbSafeSoftwareReset()
352 * dwIoBase - Base Address for MAC
359 bool MACbSafeRxOff(void __iomem *dwIoBase) MACbSafeRxOff() argument
368 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_CLRRUN); MACbSafeRxOff()
369 VNSvOutPortD(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_CLRRUN); MACbSafeRxOff()
371 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL0, &dwData); MACbSafeRxOff()
380 VNSvInPortD(dwIoBase + MAC_REG_RXDMACTL1, &dwData); MACbSafeRxOff()
390 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_RXON); MACbSafeRxOff()
393 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); MACbSafeRxOff()
410 * dwIoBase - Base Address for MAC
417 bool MACbSafeTxOff(void __iomem *dwIoBase) MACbSafeTxOff() argument
425 VNSvOutPortD(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_CLRRUN); MACbSafeTxOff()
427 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_CLRRUN); MACbSafeTxOff()
430 VNSvInPortD(dwIoBase + MAC_REG_TXDMACTL0, &dwData); MACbSafeTxOff()
439 VNSvInPortD(dwIoBase + MAC_REG_AC0DMACTL, &dwData); MACbSafeTxOff()
449 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_TXON); MACbSafeTxOff()
453 VNSvInPortB(dwIoBase + MAC_REG_HOSTCR, &byData); MACbSafeTxOff()
470 * dwIoBase - Base Address for MAC
477 bool MACbSafeStop(void __iomem *dwIoBase) MACbSafeStop() argument
479 MACvRegBitsOff(dwIoBase, MAC_REG_TCR, TCR_AUTOBCNTX); MACbSafeStop()
481 if (!MACbSafeRxOff(dwIoBase)) { MACbSafeStop()
483 MACbSafeSoftwareReset(dwIoBase); MACbSafeStop()
486 if (!MACbSafeTxOff(dwIoBase)) { MACbSafeStop()
488 MACbSafeSoftwareReset(dwIoBase); MACbSafeStop()
492 MACvRegBitsOff(dwIoBase, MAC_REG_HOSTCR, HOSTCR_MACEN); MACbSafeStop()
503 * dwIoBase - Base Address for MAC
510 bool MACbShutdown(void __iomem *dwIoBase) MACbShutdown() argument
513 MACvIntDisable(dwIoBase); MACbShutdown()
514 MACvSetLoopbackMode(dwIoBase, MAC_LB_INTERNAL); MACbShutdown()
516 if (!MACbSafeStop(dwIoBase)) { MACbShutdown()
517 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE); MACbShutdown()
520 MACvSetLoopbackMode(dwIoBase, MAC_LB_NONE); MACbShutdown()
530 * dwIoBase - Base Address for MAC
537 void MACvInitialize(void __iomem *dwIoBase) MACvInitialize() argument
540 MACvClearStckDS(dwIoBase); MACvInitialize()
542 VNSvOutPortB(dwIoBase + MAC_REG_PMC1, PME_OVR); MACvInitialize()
546 MACbSoftwareReset(dwIoBase); MACvInitialize()
549 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTRST); MACvInitialize()
551 VNSvOutPortB(dwIoBase + MAC_REG_TFTCTL, TFTCTL_TSFCNTREN); MACvInitialize()
560 * dwIoBase - Base Address for MAC
568 void MACvSetCurrRx0DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr) MACvSetCurrRx0DescAddr() argument
574 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byOrgDMACtl); MACvSetCurrRx0DescAddr()
576 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0+2, DMACTL_RUN); MACvSetCurrRx0DescAddr()
579 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL0, &byData); MACvSetCurrRx0DescAddr()
584 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR0, dwCurrDescAddr); MACvSetCurrRx0DescAddr()
586 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL0, DMACTL_RUN); MACvSetCurrRx0DescAddr()
595 * dwIoBase - Base Address for MAC
603 void MACvSetCurrRx1DescAddr(void __iomem *dwIoBase, unsigned long dwCurrDescAddr) MACvSetCurrRx1DescAddr() argument
609 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byOrgDMACtl); MACvSetCurrRx1DescAddr()
611 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1+2, DMACTL_RUN); MACvSetCurrRx1DescAddr()
614 VNSvInPortB(dwIoBase + MAC_REG_RXDMACTL1, &byData); MACvSetCurrRx1DescAddr()
619 VNSvOutPortD(dwIoBase + MAC_REG_RXDMAPTR1, dwCurrDescAddr); MACvSetCurrRx1DescAddr()
621 VNSvOutPortB(dwIoBase + MAC_REG_RXDMACTL1, DMACTL_RUN); MACvSetCurrRx1DescAddr()
631 * dwIoBase - Base Address for MAC
639 void MACvSetCurrTx0DescAddrEx(void __iomem *dwIoBase, MACvSetCurrTx0DescAddrEx() argument
646 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byOrgDMACtl); MACvSetCurrTx0DescAddrEx()
648 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0+2, DMACTL_RUN); MACvSetCurrTx0DescAddrEx()
651 VNSvInPortB(dwIoBase + MAC_REG_TXDMACTL0, &byData); MACvSetCurrTx0DescAddrEx()
656 VNSvOutPortD(dwIoBase + MAC_REG_TXDMAPTR0, dwCurrDescAddr); MACvSetCurrTx0DescAddrEx()
658 VNSvOutPortB(dwIoBase + MAC_REG_TXDMACTL0, DMACTL_RUN); MACvSetCurrTx0DescAddrEx()
667 * dwIoBase - Base Address for MAC
676 void MACvSetCurrAC0DescAddrEx(void __iomem *dwIoBase, MACvSetCurrAC0DescAddrEx() argument
683 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byOrgDMACtl); MACvSetCurrAC0DescAddrEx()
685 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL+2, DMACTL_RUN); MACvSetCurrAC0DescAddrEx()
688 VNSvInPortB(dwIoBase + MAC_REG_AC0DMACTL, &byData); MACvSetCurrAC0DescAddrEx()
694 VNSvOutPortD(dwIoBase + MAC_REG_AC0DMAPTR, dwCurrDescAddr); MACvSetCurrAC0DescAddrEx()
696 VNSvOutPortB(dwIoBase + MAC_REG_AC0DMACTL, DMACTL_RUN); MACvSetCurrAC0DescAddrEx()
699 void MACvSetCurrTXDescAddr(int iTxType, void __iomem *dwIoBase, MACvSetCurrTXDescAddr() argument
703 MACvSetCurrAC0DescAddrEx(dwIoBase, dwCurrDescAddr); MACvSetCurrTXDescAddr()
705 MACvSetCurrTx0DescAddrEx(dwIoBase, dwCurrDescAddr); MACvSetCurrTXDescAddr()
714 * dwIoBase - Base Address for MAC
722 void MACvTimer0MicroSDelay(void __iomem *dwIoBase, unsigned int uDelay) MACvTimer0MicroSDelay() argument
727 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); MACvTimer0MicroSDelay()
728 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA0, uDelay); MACvTimer0MicroSDelay()
729 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, (TMCTL_TMD | TMCTL_TE)); MACvTimer0MicroSDelay()
732 VNSvInPortB(dwIoBase + MAC_REG_TMCTL0, &byValue); MACvTimer0MicroSDelay()
735 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); MACvTimer0MicroSDelay()
740 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL0, 0); MACvTimer0MicroSDelay()
749 * dwIoBase - Base Address for MAC
757 void MACvOneShotTimer1MicroSec(void __iomem *dwIoBase, unsigned int uDelayTime) MACvOneShotTimer1MicroSec() argument
759 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, 0); MACvOneShotTimer1MicroSec()
760 VNSvOutPortD(dwIoBase + MAC_REG_TMDATA1, uDelayTime); MACvOneShotTimer1MicroSec()
761 VNSvOutPortB(dwIoBase + MAC_REG_TMCTL1, (TMCTL_TMD | TMCTL_TE)); MACvOneShotTimer1MicroSec()
764 void MACvSetMISCFifo(void __iomem *dwIoBase, unsigned short wOffset, MACvSetMISCFifo() argument
769 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); MACvSetMISCFifo()
770 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); MACvSetMISCFifo()
771 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); MACvSetMISCFifo()
774 bool MACbPSWakeup(void __iomem *dwIoBase) MACbPSWakeup() argument
779 if (MACbIsRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PS)) MACbPSWakeup()
783 MACvRegBitsOff(dwIoBase, MAC_REG_PSCTL, PSCTL_PSEN); MACbPSWakeup()
787 VNSvInPortB(dwIoBase + MAC_REG_PSCTL, &byOrgValue); MACbPSWakeup()
804 * dwIoBase - Base Address for MAC
813 void MACvSetKeyEntry(void __iomem *dwIoBase, unsigned short wKeyCtl, MACvSetKeyEntry() argument
836 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); MACvSetKeyEntry()
837 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); MACvSetKeyEntry()
838 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); MACvSetKeyEntry()
851 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); MACvSetKeyEntry()
852 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, dwData); MACvSetKeyEntry()
853 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); MACvSetKeyEntry()
861 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset+ii); MACvSetKeyEntry()
862 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, *pdwKey++); MACvSetKeyEntry()
863 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); MACvSetKeyEntry()
873 * dwIoBase - Base Address for MAC
881 void MACvDisableKeyEntry(void __iomem *dwIoBase, unsigned int uEntryIdx) MACvDisableKeyEntry() argument
888 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, wOffset); MACvDisableKeyEntry()
889 VNSvOutPortD(dwIoBase + MAC_REG_MISCFFDATA, 0); MACvDisableKeyEntry()
890 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFCTL, MISCFFCTL_WRITE); MACvDisableKeyEntry()
H A Dsrom.c67 * dwIoBase - I/O base address
75 unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase, unsigned char byContntOffset) SROMbyReadEmbedded() argument
83 VNSvInPortB(dwIoBase + MAC_REG_I2MCFG, &byOrg); SROMbyReadEmbedded()
85 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, (byOrg & (~I2MCFG_NORETRY))); SROMbyReadEmbedded()
87 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGID, EEP_I2C_DEV_ID); SROMbyReadEmbedded()
88 VNSvOutPortB(dwIoBase + MAC_REG_I2MTGAD, byContntOffset); SROMbyReadEmbedded()
91 VNSvOutPortB(dwIoBase + MAC_REG_I2MCSR, I2MCSR_EEMR); SROMbyReadEmbedded()
94 VNSvInPortB(dwIoBase + MAC_REG_I2MCSR, &byWait); SROMbyReadEmbedded()
104 VNSvInPortB(dwIoBase + MAC_REG_I2MDIPT, &byData); SROMbyReadEmbedded()
105 VNSvOutPortB(dwIoBase + MAC_REG_I2MCFG, byOrg); SROMbyReadEmbedded()
114 * dwIoBase - I/O base address
121 void SROMvReadAllContents(void __iomem *dwIoBase, unsigned char *pbyEepromRegs) SROMvReadAllContents() argument
127 *pbyEepromRegs = SROMbyReadEmbedded(dwIoBase, (unsigned char)ii); SROMvReadAllContents()
137 * dwIoBase - I/O base address
144 void SROMvReadEtherAddress(void __iomem *dwIoBase, unsigned char *pbyEtherAddress) SROMvReadEtherAddress() argument
150 *pbyEtherAddress = SROMbyReadEmbedded(dwIoBase, ii); SROMvReadEtherAddress()
H A Drf.c412 * dwIoBase - I/O base address
421 void __iomem *dwIoBase = priv->PortOffset; s_bAL7230Init() local
428 VNSvOutPortB(dwIoBase + MAC_REG_SOFTPWRCTL, 0); s_bAL7230Init()
430 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI | s_bAL7230Init()
438 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); s_bAL7230Init()
441 MACvTimer0MicroSDelay(dwIoBase, 150);/* 150us */ s_bAL7230Init()
444 MACvTimer0MicroSDelay(dwIoBase, 30);/* 30us */ s_bAL7230Init()
447 MACvTimer0MicroSDelay(dwIoBase, 30);/* 30us */ s_bAL7230Init()
451 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 | s_bAL7230Init()
460 VNSvOutPortB(dwIoBase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); /* 1100 0000 */ s_bAL7230Init()
469 void __iomem *dwIoBase = priv->PortOffset; s_bAL7230SelectChannel() local
475 MACvWordRegBitsOff(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); s_bAL7230SelectChannel()
482 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); s_bAL7230SelectChannel()
485 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel & 0x7F)); s_bAL7230SelectChannel()
486 MACvTimer0MicroSDelay(dwIoBase, SWITCH_CHANNEL_DELAY_AL7230); s_bAL7230SelectChannel()
488 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel | 0x80)); s_bAL7230SelectChannel()
498 * dwIoBase - I/O base address
508 void __iomem *dwIoBase = priv->PortOffset; IFRFbWriteEmbedded() local
512 VNSvOutPortD(dwIoBase + MAC_REG_IFREGCTL, dwData); IFRFbWriteEmbedded()
516 VNSvInPortD(dwIoBase + MAC_REG_IFREGCTL, &dwValue); IFRFbWriteEmbedded()
532 * dwIoBase - I/O base address
541 void __iomem *dwIoBase = priv->PortOffset; RFbAL2230Init() local
548 VNSvOutPortB(dwIoBase + MAC_REG_SOFTPWRCTL, 0); RFbAL2230Init()
550 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPECTI | RFbAL2230Init()
553 MACvWordRegBitsOff(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); RFbAL2230Init()
560 MACvTimer0MicroSDelay(dwIoBase, 30); /* delay 30 us */ RFbAL2230Init()
563 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, SOFTPWRCTL_SWPE3); RFbAL2230Init()
565 MACvTimer0MicroSDelay(dwIoBase, 150);/* 150us */ RFbAL2230Init()
567 MACvTimer0MicroSDelay(dwIoBase, 30);/* 30us */ RFbAL2230Init()
569 MACvTimer0MicroSDelay(dwIoBase, 30);/* 30us */ RFbAL2230Init()
572 MACvWordRegBitsOn(dwIoBase, MAC_REG_SOFTPWRCTL, (SOFTPWRCTL_SWPE3 | RFbAL2230Init()
578 VNSvOutPortB(dwIoBase + MAC_REG_PSPWRSIG, (PSSIG_WPE3 | PSSIG_WPE2)); /* 1100 0000 */ RFbAL2230Init()
585 void __iomem *dwIoBase = priv->PortOffset; RFbAL2230SelectChannel() local
594 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel & 0x7F)); RFbAL2230SelectChannel()
595 MACvTimer0MicroSDelay(dwIoBase, SWITCH_CHANNEL_DELAY_AL2230); RFbAL2230SelectChannel()
597 VNSvOutPortB(dwIoBase + MAC_REG_CHANNEL, (byChannel | 0x80)); RFbAL2230SelectChannel()
684 * dwIoBase - I/O base address
694 void __iomem *dwIoBase = priv->PortOffset; RFvWriteWakeProgSyn() local
699 VNSvOutPortW(dwIoBase + MAC_REG_MISCFFNDEX, 0); RFvWriteWakeProgSyn()
714 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230InitTable[ii]); RFvWriteWakeProgSyn()
716 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable0[uChannel-1]); RFvWriteWakeProgSyn()
718 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL2230ChannelTable1[uChannel-1]); RFvWriteWakeProgSyn()
731 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTable[ii]); RFvWriteWakeProgSyn()
734 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230InitTableAMode[ii]); RFvWriteWakeProgSyn()
737 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable0[uChannel-1]); RFvWriteWakeProgSyn()
739 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable1[uChannel-1]); RFvWriteWakeProgSyn()
741 MACvSetMISCFifo(dwIoBase, (unsigned short)(MISCFIFO_SYNDATA_IDX + ii), dwAL7230ChannelTable2[uChannel-1]); RFvWriteWakeProgSyn()
751 MACvSetMISCFifo(dwIoBase, MISCFIFO_SYNINFO_IDX, (unsigned long)MAKEWORD(bySleepCount, byInitCount)); RFvWriteWakeProgSyn()
761 * dwIoBase - I/O base address
833 * dwIoBase - I/O base address
H A Dbaseband.h63 #define BBvClearFOE(dwIoBase) \
64 BBbWriteEmbedded(dwIoBase, 0xB1, 0)
66 #define BBvSetFOE(dwIoBase) \
67 BBbWriteEmbedded(dwIoBase, 0xB1, 0x0C)
H A Dsrom.h93 unsigned char SROMbyReadEmbedded(void __iomem *dwIoBase,
96 void SROMvReadAllContents(void __iomem *dwIoBase, unsigned char *pbyEepromRegs);
98 void SROMvReadEtherAddress(void __iomem *dwIoBase,
H A Dcard.c39 * 08-26-2003 Kyle Hsu: Modify the defination type of dwIoBase.
842 void __iomem *dwIoBase = priv->PortOffset; CARDvSetLoopbackMode() local
853 MACvSetLoopbackMode(dwIoBase, LOBYTE(wLoopbackMode)); CARDvSetLoopbackMode()
920 void __iomem *dwIoBase = priv->PortOffset; CARDbGetCurrentTSF() local
924 MACvRegBitsOn(dwIoBase, MAC_REG_TFTCTL, TFTCTL_TSFCNTRRD); CARDbGetCurrentTSF()
926 VNSvInPortB(dwIoBase + MAC_REG_TFTCTL, &byData); CARDbGetCurrentTSF()
932 VNSvInPortD(dwIoBase + MAC_REG_TSFCNTR, (u32 *)pqwCurrTSF); CARDbGetCurrentTSF()
933 VNSvInPortD(dwIoBase + MAC_REG_TSFCNTR + 4, (u32 *)pqwCurrTSF + 1); CARDbGetCurrentTSF()
971 * dwIoBase - IO Base
980 void __iomem *dwIoBase = priv->PortOffset; CARDvSetFirstNextTBTT() local
987 VNSvOutPortD(dwIoBase + MAC_REG_NEXTTBTT, (u32)qwNextTBTT); CARDvSetFirstNextTBTT()
988 VNSvOutPortD(dwIoBase + MAC_REG_NEXTTBTT + 4, (u32)(qwNextTBTT >> 32)); CARDvSetFirstNextTBTT()
989 MACvRegBitsOn(dwIoBase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); CARDvSetFirstNextTBTT()
1008 void __iomem *dwIoBase = priv->PortOffset; CARDvUpdateNextTBTT() local
1012 VNSvOutPortD(dwIoBase + MAC_REG_NEXTTBTT, (u32)qwTSF); CARDvUpdateNextTBTT()
1013 VNSvOutPortD(dwIoBase + MAC_REG_NEXTTBTT + 4, (u32)(qwTSF >> 32)); CARDvUpdateNextTBTT()
1014 MACvRegBitsOn(dwIoBase, MAC_REG_TFTCTL, TFTCTL_TBTTSYNCEN); CARDvUpdateNextTBTT()
H A Dbaseband.c1915 * dwIoBase - I/O base address
1926 void __iomem *dwIoBase = priv->PortOffset; BBbReadEmbedded() local
1931 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr); BBbReadEmbedded()
1934 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGR); BBbReadEmbedded()
1937 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue); BBbReadEmbedded()
1943 VNSvInPortB(dwIoBase + MAC_REG_BBREGDATA, pbyData); BBbReadEmbedded()
1957 * dwIoBase - I/O base address
1969 void __iomem *dwIoBase = priv->PortOffset; BBbWriteEmbedded() local
1974 VNSvOutPortB(dwIoBase + MAC_REG_BBREGADR, byBBAddr); BBbWriteEmbedded()
1976 VNSvOutPortB(dwIoBase + MAC_REG_BBREGDATA, byData); BBbWriteEmbedded()
1979 MACvRegBitsOn(dwIoBase, MAC_REG_BBREGCTL, BBREGCTL_REGW); BBbWriteEmbedded()
1982 VNSvInPortB(dwIoBase + MAC_REG_BBREGCTL, &byValue); BBbWriteEmbedded()
1999 * dwIoBase - I/O base address
2013 void __iomem *dwIoBase = priv->PortOffset; BBbVT3253Init() local
2035 VNSvOutPortD(dwIoBase + MAC_REG_ITRTMSET, 0x23); BBbVT3253Init()
2036 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0)); BBbVT3253Init()
2075 VNSvOutPortB(dwIoBase + MAC_REG_ITRTMSET, 0x23); BBbVT3253Init()
2076 MACvRegBitsOn(dwIoBase, MAC_REG_PAPEDELAY, BIT(0)); BBbVT3253Init()
2097 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ BBbVT3253Init()
2105 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ BBbVT3253Init()
2153 MACvSetRFLE_LatchBase(dwIoBase); BBbVT3253Init()
2164 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/ BBbVT3253Init()
2166 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/ BBbVT3253Init()
2254 * dwIoBase - I/O base address
2275 * dwIoBase - I/O base address
2297 * dwIoBase - I/O base address
/linux-4.4.14/drivers/staging/vt6656/
H A Dmac.c93 * dwIoBase - Base Address for MAC
113 * dwIoBase - Base Address for MAC
H A Dcard.c37 * 08-26-2003 Kyle Hsu: Modify the definition type of dwIoBase.
636 * dwIoBase - IO Base

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