Searched refs:duty (Results 1 - 142 of 142) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/therm/
H A Dfanpwm.c44 u32 divs, duty; nvkm_fanpwm_get() local
47 ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty); nvkm_fanpwm_get()
49 divs = max(divs, duty); nvkm_fanpwm_get()
51 duty = divs - duty; nvkm_fanpwm_get()
52 return (duty * 100) / divs; nvkm_fanpwm_get()
63 u32 divs, duty; nvkm_fanpwm_set() local
74 duty = ((divs * percent) + 99) / 100; nvkm_fanpwm_set()
76 duty = divs - duty; nvkm_fanpwm_set()
78 ret = therm->func->pwm_set(therm, fan->func.line, divs, duty); nvkm_fanpwm_set()
91 u32 divs, duty; nvkm_fanpwm_create() local
97 therm->func->pwm_get(therm, func->line, &divs, &duty) == -ENODEV) nvkm_fanpwm_create()
H A Dfan.c39 int duty; nvkm_fan_update() local
52 /* check that we're not already at the target duty cycle */ nvkm_fan_update()
53 duty = fan->get(therm); nvkm_fan_update()
54 if (duty == target) { nvkm_fan_update()
60 if (!immediate && duty >= 0) { nvkm_fan_update()
65 if (duty < target) nvkm_fan_update()
66 duty = min(duty + 3, target); nvkm_fan_update()
67 else if (duty > target) nvkm_fan_update()
68 duty = max(duty - 3, target); nvkm_fan_update()
70 duty = target; nvkm_fan_update()
73 nvkm_debug(subdev, "FAN update: %d\n", duty); nvkm_fan_update()
74 ret = fan->set(therm, duty); nvkm_fan_update()
86 if (list_empty(&fan->alarm.head) && target != duty) { nvkm_fan_update()
91 if (duty > target) nvkm_fan_update()
93 else if (duty == target) nvkm_fan_update()
H A Dbase.c41 u16 duty, i; nvkm_therm_update_trip() local
56 duty = cur_trip->fan_duty; nvkm_therm_update_trip()
59 duty = 0; nvkm_therm_update_trip()
63 return duty; nvkm_therm_update_trip()
72 u16 duty; nvkm_therm_update_linear() local
81 duty = (temp - linear_min_temp); nvkm_therm_update_linear()
82 duty *= (therm->fan->bios.max_duty - therm->fan->bios.min_duty); nvkm_therm_update_linear()
83 duty /= (linear_max_temp - linear_min_temp); nvkm_therm_update_linear()
84 duty += therm->fan->bios.min_duty; nvkm_therm_update_linear()
85 return duty; nvkm_therm_update_linear()
96 int duty = -1; nvkm_therm_update() local
106 duty = nvkm_therm_fan_get(therm); nvkm_therm_update()
107 if (duty < 0) nvkm_therm_update()
108 duty = 100; nvkm_therm_update()
114 duty = nvkm_therm_update_trip(therm); nvkm_therm_update()
117 duty = nvkm_therm_update_linear(therm); nvkm_therm_update()
121 duty = therm->cstate; nvkm_therm_update()
137 if (duty >= 0) { nvkm_therm_update()
138 nvkm_debug(subdev, "FAN target request: %d%%\n", duty); nvkm_therm_update()
139 nvkm_therm_fan_set(therm, immd, duty); nvkm_therm_update()
H A Dgm107.c34 gm107_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) gm107_fan_pwm_get() argument
38 *duty = nvkm_rd32(device, 0x10eb24) & 0x1fff; gm107_fan_pwm_get()
43 gm107_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) gm107_fan_pwm_set() argument
47 nvkm_wr32(device, 0x10eb14, duty | 0x80000000); gm107_fan_pwm_set()
H A Dfantog.c46 int duty; nvkm_fantog_update() local
53 duty = !nvkm_gpio_get(gpio, 0, DCB_GPIO_FAN, 0xff); nvkm_fantog_update()
54 nvkm_gpio_set(gpio, 0, DCB_GPIO_FAN, 0xff, duty); nvkm_fantog_update()
56 if (list_empty(&fan->alarm.head) && percent != (duty * 100)) { nvkm_fantog_update()
58 if (!duty) nvkm_fantog_update()
H A Dgf119.c67 gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) gf119_fan_pwm_get() argument
76 *duty = nvkm_rd32(device, 0x00e118 + (indx * 8)); gf119_fan_pwm_get()
81 *duty = nvkm_rd32(device, 0x0200dc) & 0x1fff; gf119_fan_pwm_get()
89 gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) gf119_fan_pwm_set() argument
97 nvkm_wr32(device, 0x00e118 + (indx * 8), duty | 0x80000000); gf119_fan_pwm_set()
100 nvkm_wr32(device, 0x0200dc, duty | 0x40000000); gf119_fan_pwm_set()
H A Dnv40.c121 nv40_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) nv40_fan_pwm_get() argument
128 *duty = (reg & 0x7fff0000) >> 16; nv40_fan_pwm_get()
137 *duty = (reg & 0x7fffffff); nv40_fan_pwm_get()
149 nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) nv40_fan_pwm_set() argument
154 nvkm_mask(device, 0x0010f0, 0x7fff7fff, (duty << 16) | divs); nv40_fan_pwm_set()
158 nvkm_mask(device, 0x0015f4, 0x7fffffff, duty); nv40_fan_pwm_set()
H A Dnv50.c66 nv50_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty) nv50_fan_pwm_get() argument
75 *duty = nvkm_rd32(device, 0x00e118 + (id * 8)); nv50_fan_pwm_get()
83 nv50_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty) nv50_fan_pwm_set() argument
91 nvkm_wr32(device, 0x00e118 + (id * 8), duty | 0x80000000); nv50_fan_pwm_set()
/linux-4.4.14/drivers/pwm/
H A Dpwm-renesas-tpu.c86 u16 duty; member in struct:tpu_pwm_device
187 tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty); tpu_pwm_timer_start()
191 pwm->channel, pwm->duty, pwm->period); tpu_pwm_timer_start()
235 pwm->duty = 0; tpu_pwm_request()
262 u32 duty; tpu_pwm_config() local
284 duty = clk_rate / prescalers[prescaler] tpu_pwm_config()
286 if (duty > period) tpu_pwm_config()
289 duty = 0; tpu_pwm_config()
293 "rate %u, prescaler %u, period %u, duty %u\n", tpu_pwm_config()
294 clk_rate, prescalers[prescaler], period, duty); tpu_pwm_config()
301 pwm->duty = duty; tpu_pwm_config()
309 * If only the duty cycle changed and the timer is already tpu_pwm_config()
311 * modify the duty cycle. tpu_pwm_config()
313 tpu_pwm_write(pwm, TPU_TGRAn, pwm->duty); tpu_pwm_config()
315 pwm->duty); tpu_pwm_config()
323 if (duty == 0 || duty == period) { tpu_pwm_config()
326 * 0% and 100% duty cycles as fixed levels and stop the timer. tpu_pwm_config()
328 tpu_pwm_set_pin(pwm, duty ? TPU_PIN_ACTIVE : TPU_PIN_INACTIVE); tpu_pwm_config()
356 * 100% duty cycles as fixed levels and stop the timer. tpu_pwm_enable()
358 if (pwm->duty == 0 || pwm->duty == pwm->period) { tpu_pwm_enable()
359 tpu_pwm_set_pin(pwm, pwm->duty ? tpu_pwm_enable()
H A Dpwm-atmel-tcb.c36 unsigned duty; /* PWM duty expressed in clk cycles */ member in struct:atmel_tcb_pwm_device
87 tcbpwm->duty = 0; atmel_tcb_pwm_request()
99 tcbpwm->duty = atmel_tcb_pwm_request()
102 tcbpwm->duty = atmel_tcb_pwm_request()
144 * If duty is 0 the timer will be stopped and we have to atmel_tcb_pwm_disable()
151 if (tcbpwm->duty == 0) atmel_tcb_pwm_disable()
200 * If duty is 0 the timer will be stopped and we have to atmel_tcb_pwm_enable()
207 if (tcbpwm->duty == 0) atmel_tcb_pwm_enable()
233 * If duty is 0 or equal to period there's no need to register atmel_tcb_pwm_enable()
238 if (tcbpwm->duty != tcbpwm->period && tcbpwm->duty > 0) { atmel_tcb_pwm_enable()
257 __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RA)); atmel_tcb_pwm_enable()
259 __raw_writel(tcbpwm->duty, regs + ATMEL_TC_REG(group, RB)); atmel_tcb_pwm_enable()
282 unsigned duty; atmel_tcb_pwm_config() local
317 duty = div_u64(duty_ns, min); atmel_tcb_pwm_config()
337 if ((atcbpwm && atcbpwm->duty > 0 && atmel_tcb_pwm_config()
338 atcbpwm->duty != atcbpwm->period) && atmel_tcb_pwm_config()
347 tcbpwm->duty = duty; atmel_tcb_pwm_config()
H A Dpwm-bfin.c69 unsigned long period, duty; bfin_pwm_config() local
78 duty = period - val; bfin_pwm_config()
80 if (duty >= period) bfin_pwm_config()
81 duty = period - 1; bfin_pwm_config()
84 set_gptimer_pwidth(priv->pin, duty); bfin_pwm_config()
H A Dpwm-clps711x.c72 unsigned int duty; clps711x_pwm_config() local
77 duty = clps711x_get_duty(pwm, duty_ns); clps711x_pwm_config()
78 clps711x_pwm_update_val(priv, pwm->hwpwm, duty); clps711x_pwm_config()
86 unsigned int duty; clps711x_pwm_enable() local
88 duty = clps711x_get_duty(pwm, pwm_get_duty_cycle(pwm)); clps711x_pwm_enable()
89 clps711x_pwm_update_val(priv, pwm->hwpwm, duty); clps711x_pwm_enable()
H A Dpwm-rockchip.c41 unsigned long duty; member in struct:rockchip_pwm_regs
105 unsigned long period, duty; rockchip_pwm_config() local
112 * Since period and duty cycle registers have a width of 32 rockchip_pwm_config()
122 duty = div; rockchip_pwm_config()
129 writel(duty, pc->base + pc->data->regs.duty); rockchip_pwm_config()
190 .duty = 0x04,
202 .duty = 0x08,
214 .duty = 0x08,
H A Dpwm-jz4740.c113 unsigned long period, duty; jz4740_pwm_config() local
132 duty = period - tmp; jz4740_pwm_config()
134 if (duty >= period) jz4740_pwm_config()
135 duty = period - 1; jz4740_pwm_config()
142 jz4740_timer_set_duty(pwm->hwpwm, duty); jz4740_pwm_config()
H A Dpwm-pca9685.c35 * However, the ratio between each configured duty cycle and the chip-wide
95 unsigned long long duty; pca9685_pwm_config() local
122 * If the duty cycle did not change, restart PWM with pca9685_pwm_config()
123 * the same duty cycle to period ratio and return. pca9685_pwm_config()
177 duty = PCA9685_COUNTER_RANGE * (unsigned long long)duty_ns; pca9685_pwm_config()
178 duty = DIV_ROUND_UP_ULL(duty, period_ns); pca9685_pwm_config()
185 regmap_write(pca->regmap, reg, (int)duty & 0xff); pca9685_pwm_config()
192 regmap_write(pca->regmap, reg, ((int)duty >> 8) & 0xf); pca9685_pwm_config()
H A Dpwm-lpc32xx.c53 /* The duty-cycle value is as follows: lpc32xx_pwm_config()
63 * In other words, the register value is duty-cycle % 256 with lpc32xx_pwm_config()
64 * duty-cycle in the range 1-256. lpc32xx_pwm_config()
H A Dpwm-img.c44 * in number of step periods. The PWM duty cycle is also
46 * In other words, the timebase imposes the duty cycle
48 * a minimum value to allow a sane range of duty cycle values.
91 u32 val, div, duty, timebase; img_pwm_config() local
124 duty = DIV_ROUND_UP(timebase * duty_ns, period_ns); img_pwm_config()
132 val = (duty << PWM_CH_CFG_DUTY_SHIFT) | img_pwm_config()
H A Dpwm-berlin.c63 u32 value, duty, period; berlin_pwm_config() local
84 duty = cycles; berlin_pwm_config()
91 berlin_pwm_writel(pwm, pwm_dev->hwpwm, duty, BERLIN_PWM_DUTY); berlin_pwm_config()
H A Dpwm-atmel.c52 * Max value for duty and period
54 * Although the duty and period register is 32 bit,
136 /* Calculate the duty cycles */ atmel_pwm_config()
182 * If the PWM channel is disabled, write value to duty and period atmel_pwm_config_v1()
196 * If the PWM channel is enabled, using the duty update register atmel_pwm_config_v2()
202 * If the PWM channel is disabled, write value to duty and atmel_pwm_config_v2()
H A Dpwm-fsl-ftm.c223 unsigned long long duty; fsl_pwm_calculate_duty() local
227 duty = (unsigned long long)duty_ns * (val + 1); fsl_pwm_calculate_duty()
228 do_div(duty, period_ns); fsl_pwm_calculate_duty()
230 return (unsigned long)duty; fsl_pwm_calculate_duty()
237 u32 period, duty; fsl_pwm_config() local
271 duty = fsl_pwm_calculate_duty(fpc, period_ns, duty_ns); fsl_pwm_config()
275 regmap_write(fpc->regmap, FTM_CV(pwm->hwpwm), duty); fsl_pwm_config()
H A Dpwm-bcm-kona.c31 * duty to achieve output equivalent to that of a normal disable operation.
33 * 2) Changes to prescale, duty, period, and polarity do not take effect until
120 * Find period count, duty count and prescale to suit duty_ns and kona_pwmc_config()
154 * Don't apply settings if disabled. The period and duty cycle are kona_pwmc_config()
237 /* Simulate a disable by configuring for zero duty */ kona_pwmc_disable()
H A Dpwm-brcmstb.c117 * produce a flat 100% duty cycle signal, and max out the "on" time brcmstb_pwm_config()
144 * We can be called with separate duty and period updates, brcmstb_pwm_config()
156 * frequency generator to output a 50% duty cycle variable brcmstb_pwm_config()
H A Dpwm-crc.c92 /* change the pwm duty cycle */ crc_pwm_config()
H A Dpwm-atmel-hlcdc.c123 * The PWM duty cycle is configurable from 0/256 to 255/256 of the atmel_hlcdc_pwm_config()
124 * period cycle. Hence we can't set a duty cycle occupying the atmel_hlcdc_pwm_config()
H A Dpwm-lp3943.c111 * 3) Duty = input duty lp3943_pwm_config()
113 * Prescale and duty are register values lp3943_pwm_config()
H A Dpwm-samsung.c63 * @duty_ns: current duty time in nanoseconds programmed to the hardware
340 /* 0% duty is not available */ pwm_samsung_config()
348 /* -1UL will give 100% duty. */ pwm_samsung_config()
359 * In case the PWM is currently at 100% duty cycle, force a manual pwm_samsung_config()
H A Dpwm-tegra.c76 * Convert from duty_ns / period_ns to a fixed number of duty ticks tegra_pwm_config()
H A Dpwm-twl-led.c77 * To configure the duty period: twl4030_pwmled_config()
H A Dpwm-twl.c79 * To configure the duty period: twl_pwm_config()
H A Dpwm-sti.c186 dev_dbg(dev, "prescale:%u, period:%i, duty:%i, pwmvalx:%u\n", sti_pwm_config()
H A Dpwm-tiehrpwm.c297 /* Update period & duty cycle with presacler division */ ehrpwm_pwm_config()
/linux-4.4.14/drivers/leds/
H A Dleds-pwm.c33 int duty; member in struct:led_pwm_data
44 int new_duty = led_dat->duty; __led_pwm_set()
68 unsigned long long duty = led_dat->period; led_pwm_set() local
70 duty *= brightness; led_pwm_set()
71 do_div(duty, max); led_pwm_set()
74 duty = led_dat->period - duty; led_pwm_set()
76 led_dat->duty = duty; led_pwm_set()
H A Dleds-lp3944.c23 * - duty cycle: percentage of the period the led is on, from 0 to 100
61 /* duty cycle is a percentage */
133 * Set the duty cycle for DIM status
153 /* Convert duty cycle to PWM value */ lp3944_dim_set_dutycycle()
254 /* invert duty cycle for inverted leds, this has the same effect of lp3944_led_set_blink()
H A Dleds-ipaq-micro.c56 /* Maximum duty cycle in ms 256/10 sec = 25600 ms */
H A Dleds-pca955x.c156 * Write to PWM register, which determines the duty cycle of the
345 /* PWM0 is used for half brightness or 50% duty cycle */ pca955x_probe()
H A Dleds-pca963x.c244 * From manual: duty cycle = (GDC / 256) -> pca963x_blink_set()
/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/volt/
H A Dgk104.c42 u32 div, duty; gk104_volt_get() local
45 duty = nvkm_rd32(device, 0x20344); gk104_volt_get()
47 return bios->base + bios->pwm_range * duty / div; gk104_volt_get()
55 u32 div, duty; gk104_volt_set() local
59 duty = (uv - bios->base) * div / bios->pwm_range; gk104_volt_set()
62 nvkm_wr32(device, 0x20344, 0x80000000 | duty); gk104_volt_set()
/linux-4.4.14/drivers/hwmon/
H A Dpwm-fan.c43 unsigned long duty; __set_pwm() local
50 duty = DIV_ROUND_UP(pwm * (ctx->pwm->period - 1), MAX_PWM); __set_pwm()
51 ret = pwm_config(ctx->pwm, duty, ctx->pwm->period); __set_pwm()
236 /* Set duty cycle to maximum allowed */ pwm_fan_probe()
306 unsigned long duty; pwm_fan_resume() local
312 duty = DIV_ROUND_UP(ctx->pwm_value * (ctx->pwm->period - 1), MAX_PWM); pwm_fan_resume()
313 ret = pwm_config(ctx->pwm, duty, ctx->pwm->period); pwm_fan_resume()
H A Df75375s.c270 case 0: /* Manual, duty mode (full speed) */ duty_mode_enabled()
271 case 1: /* Manual, duty mode */ duty_mode_enabled()
272 case 4: /* Auto, duty mode */ duty_mode_enabled()
286 case 0: /* Manual, duty mode (full speed) */ auto_mode_enabled()
287 case 1: /* Manual, duty mode */ auto_mode_enabled()
291 case 4: /* Auto, duty mode */ auto_mode_enabled()
386 /* For now, deny dangerous toggling of duty mode */ set_pwm_enable_direct()
780 bool manu, duty; f75375_init() local
786 duty = ((mode >> F75387_FAN_DUTY_MODE(nr)) & 1); f75375_init()
787 if (!manu && duty) f75375_init()
790 else if (manu && !duty) f75375_init()
793 else if (!manu && !duty) f75375_init()
H A Dw83791d.c124 0x81, /* PWM 1 duty cycle register in DataSheet */
125 0x83, /* PWM 2 duty cycle register in DataSheet */
126 0x94, /* PWM 3 duty cycle register in DataSheet */
127 0xA0, /* PWM 4 duty cycle register in DataSheet */
128 0xA1, /* PWM 5 duty cycle register in DataSheet */
315 u8 pwm[5]; /* pwm duty cycle */
1571 /* Update PWM duty cycle */ w83791d_update_device()
H A Dvt1211.c812 * 0 1 : pwm1 low speed duty cycle (pwm_auto_pwm[0][1])
813 * 0 2 : pwm1 high speed duty cycle (pwm_auto_pwm[0][2])
816 * 1 1 : pwm2 low speed duty cycle (pwm_auto_pwm[1][1])
817 * 1 2 : pwm2 high speed duty cycle (pwm_auto_pwm[1][2])
H A Dasb100.c99 /* bit 7 -> enable, bits 0-3 -> duty cycle */
163 * REG: (6.25% duty cycle per bit)
600 data->pwm &= 0x0f; /* keep the duty cycle bits */ set_pwm_enable1()
H A Dg762.c458 /* Set PWM polarity. Accepts either 0 (positive duty) or 1 (negative duty) */ do_set_pwm_polarity()
H A Dit87.c476 * Starting with the IT8721F, the manual PWM duty cycles are stored
1094 * If we are in automatic mode, the PWM duty cycle register set_pwm()
1107 * If we are in manual mode, write the duty cycle immediately; set_pwm()
2166 * the PWM2 duty cycle, so we disable it. it87_find()
2557 * manual duty cycle. it87_init_device()
H A Dsmsc47m1.c213 * enabled and duty cycle is 0%. This is fine if the monitoring get_fan()
H A Dw83l786ng.c144 * 1->PWM variable duty cycle */
H A Dadt7475.c1341 * pwm's which are disabled to manual mode with 0% duty cycle adt7475_probe()
1469 * set the duty cycle to 0 instead adt7475_read_pwm()
H A Dw83792d.c299 u8 sf2_levels[3][4]; /* Smart FanII: Fan1,2,3 duty cycle levels */
1619 /* Update Smart Fan II duty cycle levels */ w83792d_update_device()
H A Dpc87427.c631 "Can't set PWM%d duty cycle while not in manual mode\n", set_pwm()
H A Ddme1737.c1438 * off or runs at auto_point1_pwm duty-cycle. set_pwm()
2351 * set the duty-cycles to 0% (which is identical to the PWMs being dme1737_init_device()
H A Dw83793.c260 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
H A Dw83627ehf.c476 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
H A Df71882fg.c2290 (data->pwm_enable & (1 << (2 * idx))) ? "duty-cycle" : "RPM"); f71882fg_create_fan_sysfs_files()
H A Dlm93.c305 * last written for the OVR_DC field (duty cycle override). So, we
H A Dnct6775.c935 * 0->PWM variable duty cycle
/linux-4.4.14/sound/pcmcia/pdaudiocf/
H A Dpdaudiocf.h70 #define PDAUDIOCF_BLUEDUTY0 (1<<8) /* blue LED duty cycle; 00 = 100%, 01 = 50% */
72 #define PDAUDIOCF_REDDUTY0 (1<<10) /* red LED duty cycle; 00 = 100%, 01 = 50% */
75 #define PDAUDIOCF_BLUEMODULATE (1<<13) /* save power when 100% duty cycle selected */
76 #define PDAUDIOCF_REDMODULATE (1<<14) /* save power when 100% duty cycle selected */
/linux-4.4.14/drivers/staging/iio/trigger/
H A Diio-trig-bfin-timer.c62 unsigned int duty; member in struct:bfin_tmr_state
107 if (val <= 4 || val <= st->duty) iio_bfin_tmr_frequency_store()
111 set_gptimer_pwidth(st->t->id, val - st->duty); iio_bfin_tmr_frequency_store()
235 st->duty = val; iio_bfin_tmr_trigger_probe()
240 * pulse we invert both polarity and duty cycle, so that the iio_bfin_tmr_trigger_probe()
246 st->duty = 1; iio_bfin_tmr_trigger_probe()
/linux-4.4.14/include/linux/
H A Dpwm.h65 * @PWM_POLARITY_NORMAL: a high signal for the duration of the duty-
68 * @PWM_POLARITY_INVERSED: a low signal for the duration of the duty-
93 * @duty_cycle: duty cycle of the PWM signal (in nanoseconds)
126 static inline void pwm_set_duty_cycle(struct pwm_device *pwm, unsigned int duty) pwm_set_duty_cycle() argument
129 pwm->duty_cycle = duty; pwm_set_duty_cycle()
151 * @config: configure duty cycles and period length for this PWM
/linux-4.4.14/arch/mips/include/asm/mach-jz4740/
H A Dtimer.h94 static inline void jz4740_timer_set_duty(unsigned int timer, uint16_t duty) jz4740_timer_set_duty() argument
96 writew(duty, jz4740_timer_base + JZ_REG_TIMER_DHR(timer)); jz4740_timer_set_duty()
/linux-4.4.14/drivers/video/backlight/
H A Dlp8788_bl.c128 unsigned int duty; lp8788_pwm_ctrl() local
136 duty = br * period / max_br; lp8788_pwm_ctrl()
150 pwm_config(bl->pwm, duty, period); lp8788_pwm_ctrl()
151 if (duty) lp8788_pwm_ctrl()
H A Dlm3630a_bl.c166 unsigned int duty = br * period / br_max; lm3630a_pwm_ctrl() local
168 pwm_config(pchip->pwmd, duty, period); lm3630a_pwm_ctrl()
169 if (duty) lm3630a_pwm_ctrl()
H A Dlp855x_bl.c239 unsigned int duty = br * period / max_br; lp855x_pwm_ctrl() local
251 pwm_config(lp->pwm, duty, period); lp855x_pwm_ctrl()
252 if (duty) lp855x_pwm_ctrl()
H A Dpandora_bl.c71 * set PWM duty cycle to max. TPS61161 seems to use this pandora_backlight_update_status()
H A D88pm860x_bl.c209 res = platform_get_resource_byname(pdev, IORESOURCE_REG, "duty cycle"); pm860x_backlight_probe()
211 dev_err(&pdev->dev, "No REG resource for duty cycle\n"); pm860x_backlight_probe()
/linux-4.4.14/kernel/
H A Dworkqueue_internal.h16 * The poor guys doing the actual heavy lifting. All on-duty workers are
/linux-4.4.14/drivers/input/misc/
H A Dmax8997_haptic.c75 unsigned int duty = chip->pwm_period * chip->level / 100; max8997_haptic_set_duty_cycle() local
76 ret = pwm_config(chip->pwm, duty, chip->pwm_period); max8997_haptic_set_duty_cycle()
H A Dmax77693-haptic.c223 dev_err(haptic->dev, "failed to set duty cycle: %d\n", error); max77693_haptic_play_work()
/linux-4.4.14/drivers/media/rc/
H A Drc-loopback.c80 dprintk("invalid duty cycle: %u\n", duty_cycle); loop_set_tx_duty_cycle()
84 dprintk("setting duty cycle: %u\n", duty_cycle); loop_set_tx_duty_cycle()
H A Dir-rx51.c55 unsigned int duty_cycle; /* carrier duty cycle */
328 dev_err(lirc_rx51->dev, ": invalid duty cycle %d\n", lirc_rx51_ioctl()
H A Dene_ir.c353 dbg("RX: sensed carrier = %d Hz, duty cycle %d%%", ene_rx_sense_carrier()
544 /* Set up the TX carrier frequency and duty cycle */ ene_tx_set_carrier()
915 /*outside interface : set tx duty cycle */ ene_set_tx_duty_cycle()
919 dbg("TX: setting duty cycle to %d%%", duty_cycle); ene_set_tx_duty_cycle()
H A Dite-cir.c72 /* override tx duty cycle */
75 MODULE_PARM_DESC(tx_duty_cycle, "Override TX duty cycle, 1-100");
368 /* set the tx duty cycle by controlling the pulse width */ ite_set_tx_duty_cycle()
1553 ite_pr(KERN_NOTICE, "TX duty cycle (%%): %d\n", (int) ite_probe()
H A Dite-cir.h78 /* duty cycle, 0-100 */
/linux-4.4.14/drivers/cpufreq/
H A Dp4-clockmod.c78 pr_debug("CPU#%d setting duty cycle to %d%%\n", cpufreq_p4_setdc()
82 * bits 3-1 : duty cycle cpufreq_p4_setdc()
/linux-4.4.14/arch/arm/include/asm/hardware/
H A Dlocomo.h117 #define LOCOMO_ALD 0x04 /* Adjust light duty */
215 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf);
/linux-4.4.14/lib/
H A Dsg_split.c146 * It will be the caller's duty to kfree() out array members.
/linux-4.4.14/kernel/time/
H A Dtick-sched.c118 * Check if the do_timer duty was dropped. We don't care about tick_sched_do_timer()
121 * this duty, then the jiffies update is still serialized by tick_sched_do_timer()
301 * The boot CPU handles housekeeping duty (unbound timers, tick_nohz_cpu_down_callback()
626 * was the one which had the do_timer() duty last. If this cpu tick_nohz_stop_sched_tick()
627 * is the one which had the do_timer() duty last, we limit the tick_nohz_stop_sched_tick()
775 * Boot safety: make sure the timekeeping duty has been can_stop_idle_tick()
H A Dtick-common.c47 * 2) Hand off the duty in the NOHZ idle case by setting the value to
/linux-4.4.14/drivers/i2c/busses/
H A Di2c-lpc2k.c52 /* I2C SCL clock has different duty cycle depending on mode */
415 /* Setup I2C dividers to generate clock with proper duty cycle */ i2c_lpc2k_probe()
H A Di2c-davinci.c227 * least 1.3uS, which is not the case with 50% duty cycle. Driving HIGH i2c_davinci_calc_clk_dividers()
H A Di2c-img-scb.c1199 * Setup clock duty cycle, start with 50% and adjust TCKH and TCKL img_i2c_init()
/linux-4.4.14/drivers/net/wireless/ath/ath9k/
H A Dgpio.c309 /* make sure duty cycle timer is also stopped when resuming */ ath9k_btcoex_timer_resume()
321 * Pause btcoex timer and bt duty cycle timer
H A Dhtc_drv_gpio.c150 * Cancel btcoex and bt duty cycle work.
/linux-4.4.14/drivers/video/fbdev/core/
H A Dfbcvt.c90 /* returns ideal duty cycle * 1000 */ fb_cvt_ideal_duty_cycle()
H A Dfbmon.c1151 * duty cycle = percent of htotal assigned to inactive display
1152 * duty cycle = C - (M/Hfreq)
1184 * duty cycle = percent of htotal assigned to inactive display
1185 * duty cycle = C - (M * h_period)
/linux-4.4.14/drivers/clk/st/
H A Dclk-flexgen.c153 * lead to 'duty cycle' issues. flexgen_set_rate()
/linux-4.4.14/drivers/video/fbdev/omap2/dss/
H A Ddpi.c162 * Odd dividers give us uneven duty cycle, causing problem when level dpi_calc_dispc_cb()
189 * Odd dividers give us uneven duty cycle, causing problem when level dpi_calc_hsdiv_cb()
/linux-4.4.14/drivers/net/can/sja1000/
H A Dpeak_pci.c369 /* duty cycle 0: 50% */ peak_pciec_init_leds()
379 /* duty cycle 1: 50% */ peak_pciec_init_leds()
/linux-4.4.14/drivers/net/wireless/brcm80211/brcmsmac/
H A Dmain.h450 * tx_duty_cycle_ofdm: maximum allowed duty cycle for OFDM.
451 * tx_duty_cycle_cck: maximum allowed duty cycle for CCK.
H A Dmain.c3731 "wl%d: duty cycle value off limit\n", brcms_c_duty_cycle_set()
7909 /* initialize maximum allowed duty cycle */ brcms_c_init()
8011 /* disable allowed duty cycle */ brcms_c_attach()
/linux-4.4.14/include/acpi/
H A Dactbl.h264 u8 duty_offset; /* Processor duty cycle index in processor P_CNT reg */
265 u8 duty_width; /* Processor duty cycle value bit width in P_CNT register */
/linux-4.4.14/arch/arm/common/
H A Dlocomo.c797 void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf) locomo_frontlight_set() argument
810 locomo_writel(duty, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALD); locomo_frontlight_set()
/linux-4.4.14/drivers/input/keyboard/
H A Dcap11xx.c243 * All LEDs share the same duty cycle as this is a HW limitation. cap11xx_led_work()
H A Dlm8323.c100 /* Load ramp counter from duty cycle field (range 0 - 0xff). */
/linux-4.4.14/drivers/clocksource/
H A Dtcb_clksrc.c246 | ATMEL_TC_ACPC_CLEAR, /* (duty cycle 50%) */ tcb_setup_dual_chan()
/linux-4.4.14/drivers/gpu/drm/gma500/
H A Dopregion.c91 u16 bclm[20]; /* backlight level duty cycle mapping table */
H A Dcdv_intel_lvds.c67 * Returns the maximum level of the backlight duty cycle field.
H A Dpsb_intel_lvds.c69 * Returns the maximum level of the backlight duty cycle field.
H A Dtc35876x-dsi-lvds.c485 /* PWM duty cycle 0x00...0x63 corresponds to 0...99% */ tc35876x_brightness_control()
/linux-4.4.14/include/media/
H A Drc-core.h112 * @s_tx_duty_cycle: set transmit duty cycle (0% - 100%)
/linux-4.4.14/drivers/mfd/
H A D88pm860x-core.c33 {2, 2, "duty cycle", IORESOURCE_REG, },
38 {4, 4, "duty cycle", IORESOURCE_REG, },
43 {6, 6, "duty cycle", IORESOURCE_REG, },
/linux-4.4.14/drivers/gpu/drm/
H A Ddrm_modes.c272 /* 12. Find ideal blanking duty cycle from formula */ drm_cvt_mode()
481 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ drm_gtf_mode_complex()
/linux-4.4.14/drivers/iio/light/
H A Dcm36651.c72 /* PS_CONF1 command code: duty ratio */
/linux-4.4.14/drivers/staging/comedi/
H A Dcomedi.h294 /* sets H bridge: duty cycle and sign bit for a relay at the
297 /* gets H bridge data: duty cycle and the sign bit */
/linux-4.4.14/drivers/media/i2c/cx25840/
H A Dcx25840-ir.c1017 * carrier polarity, and carrier duty cycle. cx25840_ir_tx_s_parameters()
1161 v4l2_info(sd, "\tCarrier duty cycle: %2u/16\n", cx25840_ir_log_status()
/linux-4.4.14/drivers/net/ethernet/intel/fm10k/
H A Dfm10k_netdev.c69 * callers duty to clean those orphaned rings.
136 * callers duty to clean those orphaned rings.
/linux-4.4.14/drivers/spi/
H A Dspidev.c393 /* use the buffer lock here for triple duty: spidev_ioctl()
/linux-4.4.14/drivers/scsi/isci/
H A Dtask.c760 * primary duty of this function is to cleanup tasks, so that is the isci_reset_device()
/linux-4.4.14/drivers/lguest/x86/
H A Dswitcher_32.S132 // %edx does the duty here as we juggle
/linux-4.4.14/drivers/gpu/ipu-v3/
H A Dipu-di.c495 * based on the divider above. We want a 50% duty cycle, so set ipu_di_config_clock()
/linux-4.4.14/drivers/clk/tegra/
H A Dclk.h60 * TEGRA_DIVIDER_INT - Some modules can not cope with the duty cycle when
H A Dclk-tegra114.c1366 * maintain the input clock duty cycle that the FCPU subsystem
/linux-4.4.14/drivers/gpu/drm/radeon/
H A Dci_dpm.c1069 u32 duty, duty100; ci_fan_ctrl_get_fan_speed_percent() local
1076 duty = (RREG32_SMC(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT; ci_fan_ctrl_get_fan_speed_percent()
1081 tmp64 = (u64)duty * 100; ci_fan_ctrl_get_fan_speed_percent()
1095 u32 duty, duty100; ci_fan_ctrl_set_fan_speed_percent() local
1115 duty = (u32)tmp64; ci_fan_ctrl_set_fan_speed_percent()
1118 tmp |= FDO_STATIC_DUTY(duty); ci_fan_ctrl_set_fan_speed_percent()
H A Dsi_dpm.c6149 u32 duty, duty100; si_fan_ctrl_get_fan_speed_percent() local
6156 duty = (RREG32(CG_THERMAL_STATUS) & FDO_PWM_DUTY_MASK) >> FDO_PWM_DUTY_SHIFT; si_fan_ctrl_get_fan_speed_percent()
6161 tmp64 = (u64)duty * 100; si_fan_ctrl_get_fan_speed_percent()
6176 u32 duty, duty100; si_fan_ctrl_set_fan_speed_percent() local
6195 duty = (u32)tmp64; si_fan_ctrl_set_fan_speed_percent()
6198 tmp |= FDO_STATIC_DUTY(duty); si_fan_ctrl_set_fan_speed_percent()
H A Datombios.h2798 ucNumberOfCyclesInPeriod: Indicate how many cycles when PWM duty is 100%. low 8 bits of the value.
2799 ucNumberOfCyclesInPeriodHi: Indicate how many cycles when PWM duty is 100%. high 8 bits of the value.If the PWM has an inverter,set bit [7]==1,otherwise set it 0
2919 usNumberOfCyclesInPeriod:Indicate how many cycles when PWM duty is 100%.
7534 UCHAR ucPLL_DutyCycle; // PLL duty cycle control
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
H A Dci_dpm.c1191 u32 duty, duty100; ci_dpm_get_fan_speed_percent() local
1199 duty = (RREG32_SMC(ixCG_THERMAL_STATUS) & CG_THERMAL_STATUS__FDO_PWM_DUTY_MASK) ci_dpm_get_fan_speed_percent()
1205 tmp64 = (u64)duty * 100; ci_dpm_get_fan_speed_percent()
1219 u32 duty, duty100; ci_dpm_set_fan_speed_percent() local
1240 duty = (u32)tmp64; ci_dpm_set_fan_speed_percent()
1243 tmp |= duty << CG_FDO_CTRL0__FDO_STATIC_DUTY__SHIFT; ci_dpm_set_fan_speed_percent()
/linux-4.4.14/drivers/video/fbdev/aty/
H A Dradeon_pm.c1479 /* Reconfigure SPLL charge pump, VCO gain, duty cycle */ radeon_pm_start_mclk_sclk()
1514 /* Reconfigure MPLL charge pump, VCO gain, duty cycle */ radeon_pm_start_mclk_sclk()
1651 /* Reconfigure SPLL charge pump, VCO gain, duty cycle, radeon_pm_restore_pixel_pll()
/linux-4.4.14/drivers/net/ethernet/intel/i40evf/
H A Di40evf_main.c1878 * callers duty to clean those orphaned rings.
1905 * callers duty to clean those orphaned rings.
/linux-4.4.14/drivers/staging/lustre/lustre/include/
H A Dlustre_fid.h297 * object or not. It is caller's duty to check more if needed. */ fid_is_namespace_visible()
/linux-4.4.14/drivers/staging/lustre/lustre/lov/
H A Dlov_lock.c355 * because enqueue will create them anyway. Main duty of this function lov_lock_sub_init()
/linux-4.4.14/drivers/media/pci/cx23885/
H A Dcx23888-ir.c1065 v4l2_info(sd, "\tCarrier duty cycle: %2u/16\n", cx23888_ir_log_status()
/linux-4.4.14/drivers/platform/x86/
H A Deeepc-laptop.c977 #define EEEPC_EC_FAN_PWM (EEEPC_EC_SC00 + 2) /* Fan PWM duty cycle (%) */
H A Dthinkpad_acpi.c7485 * maximum amount of fan duty cycle change per second seems to be
7499 * Speeds up fan to 100% duty-cycle, which is far above
/linux-4.4.14/drivers/gpu/drm/i915/
H A Dintel_opregion.c111 u16 bclm[20]; /* backlight level duty cycle mapping table */
/linux-4.4.14/arch/x86/xen/
H A Dsetup.c466 * to perform its duty on the non-RAM region. xen_foreach_remap_area()
/linux-4.4.14/drivers/power/
H A Dab8500_charger.c1325 /* LED indicator PWM duty cycle 252/256 */ ab8500_charger_led_en()
1330 dev_err(di->dev, "Set LED PWM duty cycle failed\n"); ab8500_charger_led_en()
/linux-4.4.14/drivers/staging/lustre/lustre/llite/
H A Dstatahead.c263 * hash lock. It is caller's duty to release the init refcount on the entry, so
/linux-4.4.14/drivers/video/fbdev/
H A Dau1200fb.c1252 // limit brightness pwm duty to >= 30/1600 set_global()
/linux-4.4.14/net/bluetooth/
H A Dhci_conn.c476 * happen with broken hardware or if low duty cycle was used le_conn_timeout()
/linux-4.4.14/drivers/tty/serial/
H A Dsh-sci.c1892 * D: Clock duty (D = 0 to 1.0) sci_baud_calc_hscif()
/linux-4.4.14/drivers/gpu/drm/tegra/
H A Dsor.c400 value |= 0x400; /* duty cycle */ tegra_sor_setup_pwm()
/linux-4.4.14/arch/ia64/kernel/
H A Dmca.c1271 * Monarch also has the duty of sending wakeup-IPIs to pull the
/linux-4.4.14/drivers/tty/
H A Dsynclinkmp.c4087 /* BRValue of 0 provides 50/50 duty cycle *only* when set_rate()
4089 * 50/50 duty cycle. set_rate()
/linux-4.4.14/drivers/net/ethernet/intel/ixgbevf/
H A Dixgbevf_main.c3011 * callers duty to clean those orphaned rings.
3069 * callers duty to clean those orphaned rings.
/linux-4.4.14/drivers/gpu/drm/amd/include/
H A Datombios.h2881 ucNumberOfCyclesInPeriod: Indicate how many cycles when PWM duty is 100%. low 8 bits of the value.
2882 ucNumberOfCyclesInPeriodHi: Indicate how many cycles when PWM duty is 100%. high 8 bits of the value.If the PWM has an inverter,set bit [7]==1,otherwise set it 0
3002 usNumberOfCyclesInPeriod:Indicate how many cycles when PWM duty is 100%.
8103 UCHAR ucPLL_DutyCycle; // PLL duty cycle control
/linux-4.4.14/include/linux/mfd/
H A Dcros_ec_commands.h945 /* Set target fan PWM duty cycle */
/linux-4.4.14/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_main.c5530 * callers duty to clean those orphaned rings.
5614 * callers duty to clean those orphaned rings.
/linux-4.4.14/drivers/char/pcmcia/
H A Dsynclink_cs.c2919 * Note: M *must* not be zero (causes asymetric duty cycle) mgslpc_set_rate()
/linux-4.4.14/drivers/net/ethernet/intel/i40e/
H A Di40e_main.c2612 * callers duty to clean those orphaned rings.
2650 * callers duty to clean those orphaned rings.
/linux-4.4.14/drivers/usb/core/
H A Dhub.c461 /* 30%-50% duty cycle */ led_work()
/linux-4.4.14/drivers/ata/
H A Dlibata-core.c1544 * is taken after a command times out. It's caller's duty to
/linux-4.4.14/kernel/sched/
H A Dcore.c2221 * fulfilled its duty: sched_fork()
/linux-4.4.14/include/net/
H A Dcfg80211.h596 * channel duty cycle etc.

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