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Searched refs:disp_int (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/radeon/
Drs600.c711 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); in rs600_irq_ack()
712 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
716 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
720 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
725 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
731 rdev->irq.stat_regs.r500.disp_int = 0; in rs600_irq_ack()
771 !rdev->irq.stat_regs.r500.disp_int && in rs600_irq_process()
776 rdev->irq.stat_regs.r500.disp_int || in rs600_irq_process()
783 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
792 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
[all …]
Dr600.c3871 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); in r600_irq_ack()
3882 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); in r600_irq_ack()
3895 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) in r600_irq_ack()
3897 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) in r600_irq_ack()
3899 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) in r600_irq_ack()
3901 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) in r600_irq_ack()
3903 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { in r600_irq_ack()
3914 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { in r600_irq_ack()
4089 if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) in r600_irq_process()
4099 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in r600_irq_process()
[all …]
Devergreen.c4834 rdev->irq.stat_regs.evergreen.disp_int = RREG32(DISP_INTERRUPT_STATUS); in evergreen_irq_ack()
4862 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT) in evergreen_irq_ack()
4864 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VLINE_INTERRUPT) in evergreen_irq_ack()
4901 if (rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_INTERRUPT) { in evergreen_irq_ack()
4932 if (rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_RX_INTERRUPT) { in evergreen_irq_ack()
5076 if (!(rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT)) in evergreen_irq_process()
5086 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in evergreen_irq_process()
5091 if (!(rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VLINE_INTERRUPT)) in evergreen_irq_process()
5094 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VLINE_INTERRUPT; in evergreen_irq_process()
5266 if (!(rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_INTERRUPT)) in evergreen_irq_process()
[all …]
Dsi.c6252 rdev->irq.stat_regs.evergreen.disp_int = RREG32(DISP_INTERRUPT_STATUS); in si_irq_ack()
6273 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT) in si_irq_ack()
6275 if (rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VLINE_INTERRUPT) in si_irq_ack()
6312 if (rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_INTERRUPT) { in si_irq_ack()
6343 if (rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_RX_INTERRUPT) { in si_irq_ack()
6472 if (!(rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VBLANK_INTERRUPT)) in si_irq_process()
6482 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in si_irq_process()
6487 if (!(rdev->irq.stat_regs.evergreen.disp_int & LB_D1_VLINE_INTERRUPT)) in si_irq_process()
6490 rdev->irq.stat_regs.evergreen.disp_int &= ~LB_D1_VLINE_INTERRUPT; in si_irq_process()
6662 if (!(rdev->irq.stat_regs.evergreen.disp_int & DC_HPD1_INTERRUPT)) in si_irq_process()
[all …]
Dcik.c7665 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); in cik_irq_ack()
7696 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) in cik_irq_ack()
7698 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) in cik_irq_ack()
7739 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { in cik_irq_ack()
7769 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { in cik_irq_ack()
7963 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) in cik_irq_process()
7973 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in cik_irq_process()
7978 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) in cik_irq_process()
7981 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; in cik_irq_process()
8153 if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT)) in cik_irq_process()
[all …]
Dradeon.h748 u32 disp_int; member
753 u32 disp_int; member
763 u32 disp_int; member
784 u32 disp_int; member
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c3274 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v8_0_crtc_irq() local
3279 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v8_0_crtc_irq()
3291 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v8_0_crtc_irq()
3387 uint32_t disp_int, mask, int_control, tmp; in dce_v8_0_hpd_irq() local
3396 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v8_0_hpd_irq()
3400 if (disp_int & mask) { in dce_v8_0_hpd_irq()
Ddce_v11_0.c3417 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq() local
3422 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3434 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3454 uint32_t disp_int, mask; in dce_v11_0_hpd_irq() local
3463 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()
3466 if (disp_int & mask) { in dce_v11_0_hpd_irq()
Ddce_v10_0.c3424 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq() local
3429 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()
3441 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()
3461 uint32_t disp_int, mask; in dce_v10_0_hpd_irq() local
3470 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()
3473 if (disp_int & mask) { in dce_v10_0_hpd_irq()