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Searched refs:ctxvals_pos (Results 1 – 3 of 3) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dctxnv50.c249 ctx->ctxvals_pos += 0x400; /* padding... no idea why you need it */ in nv50_grctx_generate()
282 *size = ctx.ctxvals_pos * 4; in nv50_grctx_init()
788 nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + i), val); in dd_emit()
790 ctx->ctxvals_pos += num; in dd_emit()
798 base = ctx->ctxvals_pos; in nv50_gr_construct_mmio_ddata()
1106 num = ctx->ctxvals_pos - base; in nv50_gr_construct_mmio_ddata()
1107 ctx->ctxvals_pos = base; in nv50_gr_construct_mmio_ddata()
1161 nvkm_wo32(ctx->data, 4 * (ctx->ctxvals_pos + (i << 3)), val); in xf_emit()
1163 ctx->ctxvals_pos += num << 3; in xf_emit()
1196 offset = (ctx->ctxvals_pos+0x3f)&~0x3f; in nv50_gr_construct_xfer1()
[all …]
Dctxnv40.h19 u32 ctxvals_pos; member
46 ctx->ctxvals_base = ctx->ctxvals_pos; in cp_ctx()
47 ctx->ctxvals_pos = ctx->ctxvals_base + length; in cp_ctx()
112 ctx->ctxvals_pos = offset; in cp_pos()
113 ctx->ctxvals_base = ctx->ctxvals_pos; in cp_pos()
115 cp_lsr(ctx, ctx->ctxvals_pos); in cp_pos()
Dctxnv40.c545 ctx->ctxvals_pos += len; in nv40_gr_construct_state3d_3()
577 offset = ctx->ctxvals_pos; in nv40_gr_construct_shader()
578 ctx->ctxvals_pos += (0x0300/4 + (vs_nr * vs_len)); in nv40_gr_construct_shader()
645 cp_pos (ctx, ctx->ctxvals_pos); in nv40_grctx_generate()
689 *size = ctx.ctxvals_pos * 4; in nv40_grctx_init()