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Searched refs:cp_hqd_pq_control (Results 1 – 10 of 10) sorted by relevance

/linux-4.4.14/drivers/gpu/drm/amd/amdkfd/
Dkfd_mqd_manager_vi.c113 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT | in __update_mqd()
116 m->cp_hqd_pq_control |= in __update_mqd()
118 pr_debug("kfd: cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); in __update_mqd()
153 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | in __update_mqd()
214 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | in init_mqd_hiq()
Dkfd_mqd_manager_cik.c176 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | in update_mqd()
183 m->cp_hqd_pq_control |= ffs(q->queue_size / sizeof(unsigned int)) in update_mqd()
195 m->cp_hqd_pq_control |= NO_UPDATE_RPTR; in update_mqd()
365 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | in update_mqd_hiq()
374 m->cp_hqd_pq_control |= ffs(q->queue_size / sizeof(unsigned int)) in update_mqd_hiq()
/linux-4.4.14/drivers/gpu/drm/amd/include/
Dcik_structs.h96 uint32_t cp_hqd_pq_control; member
Dvi_structs.h304 uint32_t cp_hqd_pq_control; member
/linux-4.4.14/drivers/gpu/drm/amd/amdgpu/
Dgfx_v7_0.c3264 u32 cp_hqd_pq_control; member
3467 mqd->queue_state.cp_hqd_pq_control = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v7_0_cp_compute_resume()
3468 mqd->queue_state.cp_hqd_pq_control &= in gfx_v7_0_cp_compute_resume()
3472 mqd->queue_state.cp_hqd_pq_control |= in gfx_v7_0_cp_compute_resume()
3474 mqd->queue_state.cp_hqd_pq_control |= in gfx_v7_0_cp_compute_resume()
3477 mqd->queue_state.cp_hqd_pq_control |= in gfx_v7_0_cp_compute_resume()
3480 mqd->queue_state.cp_hqd_pq_control &= in gfx_v7_0_cp_compute_resume()
3484 mqd->queue_state.cp_hqd_pq_control |= in gfx_v7_0_cp_compute_resume()
3487 WREG32(mmCP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control); in gfx_v7_0_cp_compute_resume()
Damdgpu_amdkfd_gfx_v8.c274 WREG32(mmCP_HQD_PQ_CONTROL, m->cp_hqd_pq_control); in kgd_hqd_load()
Damdgpu_amdkfd_gfx_v7.c320 WREG32(mmCP_HQD_PQ_CONTROL, m->cp_hqd_pq_control); in kgd_hqd_load()
Dgfx_v8_0.c3590 uint32_t cp_hqd_pq_control; /* ordinal145 */ member
3886 mqd->cp_hqd_pq_control = tmp; in gfx_v8_0_cp_compute_resume()
/linux-4.4.14/drivers/gpu/drm/radeon/
Dradeon_kfd.c499 write_register(kgd, CP_HQD_PQ_CONTROL, m->cp_hqd_pq_control); in kgd_hqd_load()
Dcik.c4869 u32 cp_hqd_pq_control; member
5071 mqd->queue_state.cp_hqd_pq_control = RREG32(CP_HQD_PQ_CONTROL); in cik_cp_compute_resume()
5072 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()
5075 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
5077 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
5080 mqd->queue_state.cp_hqd_pq_control |= BUF_SWAP_32BIT; in cik_cp_compute_resume()
5082 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()
5084 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
5086 WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control); in cik_cp_compute_resume()