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Searched refs:conf_reg (Results 1 – 9 of 9) sorted by relevance

/linux-4.4.14/drivers/tty/serial/
Dmen_z135_uart.c486 u32 conf_reg; in men_z135_set_mctrl() local
488 conf_reg = old = ioread32(port->membase + MEN_Z135_CONF_REG); in men_z135_set_mctrl()
490 conf_reg |= MEN_Z135_MCR_RTS; in men_z135_set_mctrl()
492 conf_reg &= ~MEN_Z135_MCR_RTS; in men_z135_set_mctrl()
495 conf_reg |= MEN_Z135_MCR_DTR; in men_z135_set_mctrl()
497 conf_reg &= ~MEN_Z135_MCR_DTR; in men_z135_set_mctrl()
500 conf_reg |= MEN_Z135_MCR_OUT1; in men_z135_set_mctrl()
502 conf_reg &= ~MEN_Z135_MCR_OUT1; in men_z135_set_mctrl()
505 conf_reg |= MEN_Z135_MCR_OUT2; in men_z135_set_mctrl()
507 conf_reg &= ~MEN_Z135_MCR_OUT2; in men_z135_set_mctrl()
[all …]
/linux-4.4.14/drivers/pinctrl/freescale/
Dpinctrl-imx.c390 if (pin_reg->conf_reg == -1) { in imx_pinconf_get()
396 *config = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_get()
413 if (pin_reg->conf_reg == -1) { in imx_pinconf_set()
425 reg = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_set()
428 writel(reg, ipctl->base + pin_reg->conf_reg); in imx_pinconf_set()
430 writel(configs[i], ipctl->base + pin_reg->conf_reg); in imx_pinconf_set()
433 pin_reg->conf_reg, configs[i]); in imx_pinconf_set()
447 if (!pin_reg || pin_reg->conf_reg == -1) { in imx_pinconf_dbg_show()
452 config = readl(ipctl->base + pin_reg->conf_reg); in imx_pinconf_dbg_show()
547 u32 conf_reg; in imx_pinctrl_parse_groups() local
[all …]
Dpinctrl-imx.h71 s16 conf_reg; member
/linux-4.4.14/drivers/hwmon/
Demc2103.c435 u8 conf_reg; in set_pwm_enable() local
454 result = read_u8_from_i2c(client, REG_FAN_CONF1, &conf_reg); in set_pwm_enable()
461 conf_reg |= 0x80; in set_pwm_enable()
463 conf_reg &= ~0x80; in set_pwm_enable()
465 i2c_smbus_write_byte_data(client, REG_FAN_CONF1, conf_reg); in set_pwm_enable()
/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx6sx-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx6ul-pinctrl.txt9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx7d-pinctrl.txt32 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
Dfsl,imx-pinctrl.txt26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
/linux-4.4.14/drivers/pinctrl/intel/
Dpinctrl-baytrail.c328 void __iomem *conf_reg = byt_gpio_reg(chip, gpio, BYT_CONF0_REG); in byt_gpio_direction_output() local
341 WARN(readl(conf_reg) & BYT_DIRECT_IRQ_EN, in byt_gpio_direction_output()