Searched refs:clock_divide (Results 1 - 1 of 1) sorted by relevance

/linux-4.4.14/drivers/clk/mxs/
H A Dclk-ssp.c30 u32 clock_divide, clock_rate; mxs_ssp_set_clk_rate() local
35 for (clock_divide = 2; clock_divide <= 254; clock_divide += 2) { mxs_ssp_set_clk_rate()
36 clock_rate = DIV_ROUND_UP(ssp_clk, rate * clock_divide); mxs_ssp_set_clk_rate()
42 if (clock_divide > 254) { mxs_ssp_set_clk_rate()
48 ssp_sck = ssp_clk / clock_divide / (1 + clock_rate); mxs_ssp_set_clk_rate()
52 val |= BF_SSP(clock_divide, TIMING_CLOCK_DIVIDE); mxs_ssp_set_clk_rate()
59 "%s: clock_divide %d, clock_rate %d, ssp_clk %d, rate_actual %d, rate_requested %d\n", mxs_ssp_set_clk_rate()
60 __func__, clock_divide, clock_rate, ssp_clk, ssp_sck, rate); mxs_ssp_set_clk_rate()

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