Searched refs:clk_hw_get_rate (Results 1 – 24 of 24) sorted by relevance
124 parent_rate = clk_hw_get_rate(parent); in _filter_clk_table()229 parent_rate = clk_hw_get_rate(parent); in mmp_clk_mix_determine_rate()244 parent_rate = clk_hw_get_rate(parent); in mmp_clk_mix_determine_rate()395 parent_rate = clk_hw_get_rate(parent); in mmp_clk_set_rate()410 parent_rate = clk_hw_get_rate(parent); in mmp_clk_set_rate()
46 rate = clk_hw_get_rate(hw); in mmp_clk_gate_enable()
106 parent_rate = clk_hw_get_rate(clk_hw_get_parent(hw)); in emc_recalc_rate()154 req->rate = clk_hw_get_rate(hw); in emc_determine_rate()317 if (clk_hw_get_rate(hw) == rate) in emc_set_rate()
637 return clk_hw_get_rate(hw); in clk_pll_round_rate()
84 req->best_parent_rate = clk_hw_get_rate(parent); in clk_composite_determine_rate()100 parent_rate = clk_hw_get_rate(parent); in clk_composite_determine_rate()
399 unsigned long clk_hw_get_rate(const struct clk_hw *hw) in clk_hw_get_rate() function403 EXPORT_SYMBOL_GPL(clk_hw_get_rate);
254 clkinp = clk_hw_get_rate(clk_hw_get_parent(&clk->hw)); in _lookup_dco()280 clkinp = clk_hw_get_rate(clk_hw_get_parent(&clk->hw)); in _lookup_sddiv()440 if (clk_hw_get_rate(hw) == clk_get_rate(dd->clk_bypass)) { in omap3_noncore_dpll_enable()
79 fint = clk_hw_get_rate(clk_hw_get_parent(&clk->hw)) / n; in _dpll_test_fint()
1014 return clk_hw_get_rate(hw); in kona_peri_clk_round_rate()1051 parent_rate = clk_hw_get_rate(current_parent); in kona_peri_clk_determine_rate()1066 parent_rate = clk_hw_get_rate(parent); in kona_peri_clk_determine_rate()1141 if (rate == clk_hw_get_rate(hw)) in kona_peri_clk_set_rate()
64 parent_rate = clk_hw_get_rate(parent); in ar100_determine_rate()
98 parent_rate = clk_hw_get_rate(parent); in clk_factors_determine_rate()
139 parent_rate = clk_hw_get_rate(parent); in sun6i_ahb1_clk_determine_rate()
124 cur_rate = clk_hw_get_rate(hwclk); in clk_cpu_on_set_rate()
72 parent_rate = clk_hw_get_rate(parent); in clk_programmable_determine_rate()
117 parent_rate = clk_hw_get_rate(parent); in clk_generated_determine_rate()
146 parent_rate = clk_hw_get_rate(parent); in clk_sam9x5_peripheral_autodiv()
210 rate = clk_hw_get_rate(p); in _freq_tbl_determine_rate()469 req->best_parent_rate = clk_hw_get_rate(req->best_parent_hw); in clk_edp_pixel_determine_rate()
434 rate = clk_hw_get_rate(p); in _freq_tbl_determine_rate()684 src_rate = clk_hw_get_rate(req->best_parent_hw); in clk_rcg_esc_determine_rate()
90 clk_hw_get_rate(clk_hw_get_parent(clk_hw_get_parent(hw))); in clk_pll_round_rate_index()
172 unsigned long pll_parent_rate = clk_hw_get_rate(pll_parent_clk); in cpu_clk_round_rate()184 return clk_hw_get_rate(parent_clk); in cpu_clk_recalc_rate()
297 drate = clk_hw_get_rate(hw); in rockchip_rk3066_pll_init()
654 unsigned long clk_hw_get_rate(const struct clk_hw *hw);
458 cached_state->vco_rate = clk_hw_get_rate(&pll->clk_hw); in dsi_pll_28nm_save_state()
424 pr = clk_hw_get_rate(pc); in alchemy_clk_fgcs_detr()