Searched refs:clk_ctl (Results 1 – 4 of 4) sorted by relevance
561 int clk_ctl = 0; in sgtl5000_set_clock() local586 clk_ctl |= SGTL5000_RATE_MODE_DIV_4 << SGTL5000_RATE_MODE_SHIFT; in sgtl5000_set_clock()589 clk_ctl |= SGTL5000_RATE_MODE_DIV_2 << SGTL5000_RATE_MODE_SHIFT; in sgtl5000_set_clock()592 clk_ctl |= SGTL5000_RATE_MODE_DIV_1 << SGTL5000_RATE_MODE_SHIFT; in sgtl5000_set_clock()601 clk_ctl |= SGTL5000_SYS_FS_32k << SGTL5000_SYS_FS_SHIFT; in sgtl5000_set_clock()604 clk_ctl |= SGTL5000_SYS_FS_44_1k << SGTL5000_SYS_FS_SHIFT; in sgtl5000_set_clock()607 clk_ctl |= SGTL5000_SYS_FS_48k << SGTL5000_SYS_FS_SHIFT; in sgtl5000_set_clock()610 clk_ctl |= SGTL5000_SYS_FS_96k << SGTL5000_SYS_FS_SHIFT; in sgtl5000_set_clock()625 clk_ctl |= SGTL5000_MCLK_FREQ_256FS << in sgtl5000_set_clock()629 clk_ctl |= SGTL5000_MCLK_FREQ_384FS << in sgtl5000_set_clock()[all …]
359 u16 clk_ctl = 0; in sdh_set_ios() local378 clk_ctl |= WIDE_BUS_4; in sdh_set_ios()387 clk_ctl |= BYTE_BUS_8; in sdh_set_ios()432 clk_ctl |= clk_div; in sdh_set_ios()433 clk_ctl |= CLK_E; in sdh_set_ios()435 bfin_write_SDH_CLK_CTL(clk_ctl); in sdh_set_ios()
110 int clk_ctl; member321 writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL); in qup_i2c_write_one()426 writel(qup->clk_ctl, qup->base + QUP_I2C_CLK_CTL); in qup_i2c_read_one()656 qup->clk_ctl = (hs_div << 8) | (fs_div & 0xff); in qup_i2c_probe()
896 static DEVICE_ATTR(clk_ctl, 0644, clk_ctl_show, clk_ctl_store);