Searched refs:clear_state_obj (Results 1 – 4 of 4) sorted by relevance
3720 if (adev->gfx.rlc.clear_state_obj) { in gfx_v7_0_rlc_fini()3721 r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); in gfx_v7_0_rlc_fini()3724 amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); in gfx_v7_0_rlc_fini()3725 amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); in gfx_v7_0_rlc_fini()3727 amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); in gfx_v7_0_rlc_fini()3728 adev->gfx.rlc.clear_state_obj = NULL; in gfx_v7_0_rlc_fini()3819 if (adev->gfx.rlc.clear_state_obj == NULL) { in gfx_v7_0_rlc_init()3824 &adev->gfx.rlc.clear_state_obj); in gfx_v7_0_rlc_init()3831 r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, false); in gfx_v7_0_rlc_init()3836 r = amdgpu_bo_pin(adev->gfx.rlc.clear_state_obj, AMDGPU_GEM_DOMAIN_VRAM, in gfx_v7_0_rlc_init()[all …]
1109 struct amdgpu_bo *clear_state_obj; member
4210 if (rdev->rlc.clear_state_obj) { in sumo_rlc_fini()4211 r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false); in sumo_rlc_fini()4214 radeon_bo_unpin(rdev->rlc.clear_state_obj); in sumo_rlc_fini()4215 radeon_bo_unreserve(rdev->rlc.clear_state_obj); in sumo_rlc_fini()4217 radeon_bo_unref(&rdev->rlc.clear_state_obj); in sumo_rlc_fini()4218 rdev->rlc.clear_state_obj = NULL; in sumo_rlc_fini()4334 if (rdev->rlc.clear_state_obj == NULL) { in sumo_rlc_init()4337 NULL, &rdev->rlc.clear_state_obj); in sumo_rlc_init()4344 r = radeon_bo_reserve(rdev->rlc.clear_state_obj, false); in sumo_rlc_init()4349 r = radeon_bo_pin(rdev->rlc.clear_state_obj, RADEON_GEM_DOMAIN_VRAM, in sumo_rlc_init()[all …]
1007 struct radeon_bo *clear_state_obj; member